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    Searched refs:clock_registers (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c 805 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL;
806 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3;
807 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4;
808 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM;
809 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
1059 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL;
1060 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL;
1061 uint32_t mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL;
1062 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL;
1063 uint32_t mpll_func_cntl = data->clock_registers.vMPLL_FUNC_CNTL
    [all...]
amdgpu_ci_smumgr.c 305 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL;
306 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3;
307 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4;
308 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM;
309 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
1035 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL;
1036 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL;
1037 uint32_t mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL;
1038 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL;
1039 uint32_t mpll_func_cntl = data->clock_registers.vMPLL_FUNC_CNTL
    [all...]
amdgpu_tonga_smumgr.c 548 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL;
549 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3;
550 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4;
551 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM;
552 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
802 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL;
803 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL;
804 uint32_t mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL;
805 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL;
806 uint32_t mpll_func_cntl = data->clock_registers.vMPLL_FUNC_CNTL
    [all...]
amdgpu_fiji_smumgr.c 867 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL;
868 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3;
869 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4;
870 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM;
871 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
1314 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL;
1315 uint32_t spll_func_cntl_2 = data->clock_registers.vCG_SPLL_FUNC_CNTL_2;
1359 table->ACPILevel.CgSpllFuncCntl3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3;
1360 table->ACPILevel.CgSpllFuncCntl4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4;
1361 table->ACPILevel.SpllSpreadSpectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_ni_dpm.c 1189 ni_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL);
1190 ni_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2);
1191 ni_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3);
1192 ni_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4);
1193 ni_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM);
1194 ni_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2);
1195 ni_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL);
1196 ni_pi->clock_registers.mpll_ad_func_cntl_2 = RREG32(MPLL_AD_FUNC_CNTL_2);
1197 ni_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL);
1198 ni_pi->clock_registers.mpll_dq_func_cntl_2 = RREG32(MPLL_DQ_FUNC_CNTL_2)
    [all...]
si_dpm.h 156 struct si_clock_registers clock_registers; member in struct:si_power_info
radeon_ci_dpm.c 1880 pi->clock_registers.cg_spll_func_cntl =
1882 pi->clock_registers.cg_spll_func_cntl_2 =
1884 pi->clock_registers.cg_spll_func_cntl_3 =
1886 pi->clock_registers.cg_spll_func_cntl_4 =
1888 pi->clock_registers.cg_spll_spread_spectrum =
1890 pi->clock_registers.cg_spll_spread_spectrum_2 =
1892 pi->clock_registers.dll_cntl = RREG32(DLL_CNTL);
1893 pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);
1894 pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL);
1895 pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL)
    [all...]
radeon_si_dpm.c 3576 si_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL);
3577 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2);
3578 si_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3);
3579 si_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4);
3580 si_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM);
3581 si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2);
3582 si_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL);
3583 si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);
3584 si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL);
3585 si_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL)
    [all...]
ci_dpm.h 202 struct ci_clock_registers clock_registers; member in struct:ci_power_info
ni_dpm.h 183 struct ni_clock_registers clock_registers; member in struct:ni_power_info
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_dpm.c 4037 si_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL);
4038 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2);
4039 si_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3);
4040 si_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4);
4041 si_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM);
4042 si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2);
4043 si_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL);
4044 si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);
4045 si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL);
4046 si_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL)
    [all...]
si_dpm.h 823 struct ni_clock_registers clock_registers; member in struct:ni_power_info
963 struct si_clock_registers clock_registers; member in struct:si_power_info
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
smu7_hwmgr.h 218 struct smu7_clock_registers clock_registers; member in struct:smu7_hwmgr
amdgpu_smu7_hwmgr.c 4287 data->clock_registers.vCG_SPLL_FUNC_CNTL =
4289 data->clock_registers.vCG_SPLL_FUNC_CNTL_2 =
4291 data->clock_registers.vCG_SPLL_FUNC_CNTL_3 =
4293 data->clock_registers.vCG_SPLL_FUNC_CNTL_4 =
4295 data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM =
4297 data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2 =
4299 data->clock_registers.vDLL_CNTL =
4301 data->clock_registers.vMCLK_PWRMGT_CNTL =
4303 data->clock_registers.vMPLL_AD_FUNC_CNTL =
4305 data->clock_registers.vMPLL_DQ_FUNC_CNTL
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