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    Searched refs:gc (Results 1 - 25 of 32) sorted by relevancy

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  /src/sys/dev/wscons/
wsdisplay_glyphcache.c 60 glyphcache_init(glyphcache *gc, int first, int lines, int width,
63 return glyphcache_init_align(gc, first, lines, width, cellwidth, cellheight,
68 glyphcache_init_align(glyphcache *gc, int first, int lines, int width,
74 gc->gc_width = width;
75 gc->gc_cellwidth = -1;
76 gc->gc_cellheight = -1;
77 gc->gc_firstline = first;
78 gc->gc_firstcol = 0;
79 gc->gc_lines = lines;
80 gc->gc_cellalign = alignment
192 glyphcache *gc = cookie; local
    [all...]
  /src/sys/external/bsd/common/linux/
linux_rcu.c 76 } gc __cacheline_aligned;
157 * If the GC isn't running anything yet, then all callbacks of
158 * interest are queued, and it suffices to wait for the GC to
161 * If the GC is already running, however, and there are any
162 * callbacks of interest queued but not in the GC's current
165 * to wait for one more generation -- or until the GC has
170 mutex_enter(&gc.lock);
171 gen = gc.gen;
172 if (gc.running)
174 while (gc.running || gc.first_callback || gc.first_kfree)
    [all...]
  /src/sys/dev/gpio/
gpiovar.h 65 #define gpiobus_open(gc, dev) \
66 ((gc)->gp_gc_open ? ((gc)->gp_gc_open((gc)->gp_cookie, dev)) : 0)
67 #define gpiobus_close(gc, dev) \
68 ((gc)->gp_gc_close ? ((gc)->gp_gc_close((gc)->gp_cookie, dev)), 1 : 0)
69 #define gpiobus_pin_read(gc, pin) \
70 ((gc)->gp_pin_read((gc)->gp_cookie, (pin))
    [all...]
gpio.c 736 gpio_chipset_tag_t gc; local
751 gc = sc->sc_gc;
781 req->gp_value = gpiobus_pin_read(gc, pin);
815 req->gp_value = gpiobus_pin_read(gc, pin);
816 gpiobus_pin_write(gc, pin, value);
844 gpiobus_pin_write(gc, pin, value);
954 gpiobus_pin_ctl(gc, pin, flags);
1028 gpio_chipset_tag_t gc; local
1036 gc = sc->sc_gc;
1053 op->gp_value = gpiobus_pin_read(gc, pin)
    [all...]
  /src/sys/dev/fdt/
fdt_gpio.c 55 struct fdtbus_gpio_controller *gc; local
57 gc = kmem_alloc(sizeof(*gc), KM_SLEEP);
58 gc->gc_dev = dev;
59 gc->gc_phandle = phandle;
60 gc->gc_funcs = funcs;
62 LIST_INSERT_HEAD(&fdtbus_gpio_controllers, gc, gc_next);
70 struct fdtbus_gpio_controller *gc; local
72 LIST_FOREACH(gc, &fdtbus_gpio_controllers, gc_next) {
73 if (gc->gc_phandle == phandle
114 struct fdtbus_gpio_controller *gc; local
154 struct fdtbus_gpio_controller *gc = gp->gp_gc; local
163 struct fdtbus_gpio_controller *gc = gp->gp_gc; local
171 struct fdtbus_gpio_controller *gc = gp->gp_gc; local
179 struct fdtbus_gpio_controller *gc = gp->gp_gc; local
187 struct fdtbus_gpio_controller *gc = gp->gp_gc; local
    [all...]
  /src/sys/arch/evbmips/gdium/
gdium_dma.c 48 gdium_dma_init(struct gdium_config *gc)
55 t = &gc->gc_pci_dmat;
56 t->_cookie = gc;
bonito_mainbus.c 70 struct gdium_config * const gc = &gdium_configuration; local
73 device_set_private(self, &gc->gc_bonito);
89 pba.pba_iot = &gc->gc_iot;
90 pba.pba_memt = &gc->gc_memt;
91 pba.pba_dmat = &gc->gc_pci_dmat;
93 pba.pba_pc = &gc->gc_pc;
machdep.c 201 struct gdium_config *gc = &gdium_configuration; local
246 bonito_pci_init(&gc->gc_pc, &gc->gc_bonito);
251 gc->gc_pc.pc_attach_hook = gdium_pci_attach_hook;
252 gdium_bus_io_init(&gc->gc_iot, gc);
253 gdium_bus_mem_init(&gc->gc_memt, gc);
254 gdium_dma_init(gc);
255 gdium_cnattach(gc);
    [all...]
gdium_genfb.c 65 gdium_cnattach(struct gdium_config *gc)
80 reg = pci_conf_read(&gc->gc_pc, pci_make_tag(&gc->gc_pc, 0, 14, 0),
107 gdium_cnattach(struct gdium_config *gc)
gdium_intr.c 178 struct gdium_config * const gc = &gdium_configuration; local
179 struct bonito_config *bc = &gc->gc_bonito;
217 gc->gc_pc.pc_intr_v = NULL;
218 gc->gc_pc.pc_intr_map = gdium_pci_intr_map;
219 gc->gc_pc.pc_intr_string = gdium_pci_intr_string;
220 gc->gc_pc.pc_intr_evcnt = gdium_pci_intr_evcnt;
221 gc->gc_pc.pc_intr_establish = gdium_pci_intr_establish;
222 gc->gc_pc.pc_intr_disestablish = gdium_pci_intr_disestablish;
223 gc->gc_pc.pc_conf_interrupt = gdium_pci_conf_interrupt;
226 gc->gc_pc.pc_pciide_compat_intr_establish = NULL
    [all...]
  /src/sys/arch/powerpc/booke/dev/
pq3gpio.c 85 struct pq3gpio_group * const gc = v; local
87 uint32_t data = bus_space_read_4(gc->gc_bst, gc->gc_bsh, gc->gc_reg);
89 return (data >> (gc->gc_pins[num].pin_num ^ 31)) & 1;
95 struct pq3gpio_group * const gc = v; local
96 const u_int mask = 1 << (gc->gc_pins[num].pin_num ^ 31);
99 u_int data = bus_space_read_4(gc->gc_bst, gc->gc_bsh, gc->gc_reg)
120 struct pq3gpio_group * const gc = v; local
172 struct pq3gpio_group * const gc = v; local
207 struct pq3gpio_group * const gc = kmem_zalloc(sizeof(*gc), KM_SLEEP); local
    [all...]
  /src/sys/arch/arm/samsung/
exynos_pinctrl.c 137 exynos_parse_config(int phandle, struct exynos_gpio_pin_cfg *gc)
139 gc->cfg_valid = of_getprop_uint32(phandle, "samsung,pin-function", &gc->cfg) == 0;
140 gc->pud_valid = of_getprop_uint32(phandle, "samsung,pin-pud", &gc->pud) == 0;
141 gc->drv_valid = of_getprop_uint32(phandle, "samsung,pin-drv", &gc->drv) == 0;
142 gc->conpwd_valid = of_getprop_uint32(phandle, "samsung,pin-conpwd", &gc->conpwd) == 0;
143 gc->pudpwd_valid = of_getprop_uint32(phandle, "samsung,pin-pudpwd", &gc->pudpwd) == 0
164 struct exynos_gpio_pin_cfg *gc = &pc->pc_pincfg; local
    [all...]
  /src/sys/arch/alpha/gbus/
gbus_io.c 73 struct gbus_config * const gc = v; local
75 *iohp = ALPHA_PHYS_TO_K0SEG(gc->gc_sysbase + addr);
143 struct gbus_config * const gc = &gbus_config; local
144 bus_space_tag_t t = &gc->gc_st;
146 if (t->abs_cookie == gc) {
148 KASSERT(gc->gc_sysbase == sysbase);
152 gc->gc_sysbase = sysbase;
161 t->abs_cookie = gc;
  /src/sys/arch/hpcmips/dev/
mq200subr.c 243 mq200_set_pll(sc, clock->gc[MQ200_GC1], crt->clock);
288 (clock->gc[MQ200_GC1] << MQ200_GCC_RCLK_SHIFT) |
300 mq200_clknames[clock->gc[MQ200_GC1]]);
313 (clock->gc[MQ200_GC2] << MQ200_GCC_RCLK_SHIFT) |
316 mq200_clknames[clock->gc[MQ200_GC2]]);
343 mq200_win_enable(struct mq200_softc *sc, int gc,
348 DPRINTF("enable window on GC%d: %dx%d(%dx%d)\n",
349 gc + 1, width, height, sc->sc_width[gc], sc->sc_height[gc]);
    [all...]
mq200debug.c 176 { "GC", MQ200_GCR(0), 0x00, 0x13 },
177 { "GC", MQ200_GCR(0), 0x20, 0x33 },
233 mq200_dump_gc(struct mq200_softc *sc, int gc)
260 reg = mq200_read(sc, MQ200_GCCR(gc));
280 if (gc == 0) {
361 reg = mq200_read(sc, MQ200_GCHDCR(gc));
362 if (gc == 0) {
374 reg = mq200_read(sc, MQ200_GCVDCR(gc));
375 if (gc == 0) {
387 reg = mq200_read(sc, MQ200_GCHSCR(gc));
    [all...]
mq200priv.h 45 u_int8_t mem, ge, gc[2]; member in struct:mq200_clock_setting
71 void mq200_win_enable(struct mq200_softc *sc, int gc,
74 void mq200_win_disable(struct mq200_softc *sc, int gc);
78 void mq200_dump_gc(struct mq200_softc *sc, int gc);
  /src/sys/arch/arm/sociox/
sni_gpio.c 205 struct gpio_chipset_tag *gc; local
215 gc = &sc->sc_gpio_gc;
216 gc->gp_cookie = sc;
217 gc->gp_pin_read = NULL; /* AAA */
218 gc->gp_pin_write = NULL; /* AAA */
219 gc->gp_pin_ctl = NULL; /* AAA */
220 gc->gp_intr_establish = NULL; /* AAA */
221 gc->gp_intr_disestablish = NULL; /* AAA */
222 gc->gp_intr_str = NULL; /* AAA */
224 gba.gba_gc = gc;
    [all...]
  /src/sys/arch/arm/imx/
imx23_pinctrl.c 54 struct gpio_chipset_tag gc; member in struct:imx23_pinctrl_softc
411 gpiobus_pin_ctl(&sc->gc, pin->pin_nr, flags);
422 gpiobus_pin_ctl(&sc->gc, pin->pin_nr, GPIO_PIN_INPUT);
434 val = gpiobus_pin_read(&sc->gc, pin->pin_nr);
451 gpiobus_pin_write(&sc->gc, pin->pin_nr, val);
492 sc->gc.gp_cookie = sc;
493 sc->gc.gp_gc_open = imx23_pinctrl_gp_gc_open;
494 sc->gc.gp_gc_close = imx23_pinctrl_gp_gc_close;
495 sc->gc.gp_pin_read = imx23_pinctrl_gp_pin_read;
496 sc->gc.gp_pin_write = imx23_pinctrl_gp_pin_write
    [all...]
  /src/sys/kern/
subr_thmap.c 280 thmap_gc_t *const gc = THMAP_GETPTR(thmap, gcaddr); local
281 gc->len = len;
282 return THMAP_GETOFF(thmap, &gc->data[0]);
290 thmap_gc_t *const gc = container_of(ptr, struct thmap_gc, data[0]); local
291 const uintptr_t gcaddr = THMAP_GETOFF(thmap, gc);
293 KASSERTMSG(gc->len == len, "thmap=%p ops=%p addr=%p len=%zu"
294 " gc=%p gc->len=%zu",
295 thmap, thmap->ops, (void *)addr, len, gc, gc->len)
975 thmap_gc_t *head, *gc; local
1003 thmap_gc_t *gc = ref; local
    [all...]
  /src/sys/ufs/chfs/
chfs_gc.c 65 * chfs_gc_trigger - wakes up GC thread, if it should run
71 struct garbage_collector_thread *gc = &chmp->chm_gc_thread; local
73 if (gc->gcth_running &&
75 cv_signal(&gc->gcth_wakeup);
85 struct garbage_collector_thread *gc = &chmp->chm_gc_thread; local
87 dbg_gc("[GC THREAD] thread started\n");
90 while (gc->gcth_running) {
107 cv_timedwait_sig(&gc->gcth_wakeup,
112 dbg_gc("[GC THREAD] thread stopped\n");
116 /* chfs_gc_thread_start - starts GC */
120 struct garbage_collector_thread *gc = &chmp->chm_gc_thread; local
134 struct garbage_collector_thread *gc = &chmp->chm_gc_thread; local
    [all...]
  /src/sys/dev/pci/
ichsmb.c 419 uint32_t gc, gc1; local
429 gc = bus_space_read_4(sc->sc_sbregt, sc->sc_sbregh, SB_SMBUS_GC);
431 gc |= SB_SMBUS_GC_NR;
433 gc &= ~SB_SMBUS_GC_NR;
434 bus_space_write_4(sc->sc_sbregt, sc->sc_sbregh, SB_SMBUS_GC, gc);
440 aprint_debug_dev(self, "gc=0x%x -> 0x%x\n", gc, gc1);
441 if ((gc1 & SB_SMBUS_GC_NR) != (gc & SB_SMBUS_GC_NR))
  /src/common/dist/zlib/contrib/puff/
Makefile 42 rm -f puff puft *.o *.gc*
  /src/share/locale/ctype/
gen_ctype_utf8.pl 166 my $gc = substr $general_category, 0, 1;
178 } elsif ( $gc eq 'P' or $gc eq 'S' ) {
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/
i915_gem_context.c 340 static void contexts_flush_free(struct i915_gem_contexts *gc)
342 contexts_free_all(llist_del_all(&gc->free_list));
347 struct i915_gem_contexts *gc = local
348 container_of(work, typeof(*gc), free_work);
350 contexts_flush_free(gc);
356 struct i915_gem_contexts *gc = &ctx->i915->gem.contexts; local
359 if (llist_add(&ctx->free_link, &gc->free_list))
360 schedule_work(&gc->free_work);
769 static void init_contexts(struct i915_gem_contexts *gc)
771 spin_lock_init(&gc->lock)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_gpu_error.c 1776 struct intel_gt_coredump *gc; local
1778 gc = kzalloc(sizeof(*gc), gfp);
1779 if (!gc)
1782 gc->_gt = gt;
1783 gc->awake = intel_gt_pm_is_awake(gt);
1785 gt_record_regs(gc);
1786 gt_record_fences(gc);
1788 return gc;

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