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    Searched refs:initialState (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rv730_dpm.c 246 table->ACPIState = table->initialState;
331 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL =
333 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 =
335 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 =
337 table->initialState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL =
339 table->initialState.levels[0].mclk.mclk730.vDLL_CNTL =
341 table->initialState.levels[0].mclk.mclk730.vMPLL_SS =
343 table->initialState.levels[0].mclk.mclk730.vMPLL_SS2 =
346 table->initialState.levels[0].mclk.mclk730.mclk_value =
349 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL
    [all...]
radeon_cypress_dpm.c 1249 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1251 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1253 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1255 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1257 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1259 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =
1262 table->initialState.levels[0].mclk.mclk770.vMPLL_SS =
1264 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
1267 table->initialState.levels[0].mclk.mclk770.mclk_value =
1270 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL
    [all...]
radeon_rv770_dpm.c 941 table->ACPIState = table->initialState;
1035 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1037 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1039 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1041 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1043 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1045 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =
1048 table->initialState.levels[0].mclk.mclk770.vMPLL_SS =
1050 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
1053 table->initialState.levels[0].mclk.mclk770.mclk_value
    [all...]
radeon_ni_dpm.c 1696 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
1698 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 =
1700 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
1702 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 =
1704 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL =
1706 table->initialState.levels[0].mclk.vDLL_CNTL =
1708 table->initialState.levels[0].mclk.vMPLL_SS =
1710 table->initialState.levels[0].mclk.vMPLL_SS2 =
1712 table->initialState.levels[0].mclk.mclk_value =
1715 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL
    [all...]
rv770_smc.h 166 RV770_SMC_SWSTATE initialState;
radeon_si_dpm.c 4380 table->initialState.levels[0].mclk.vDLL_CNTL =
4382 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL =
4384 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
4386 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
4388 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL =
4390 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_1 =
4392 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_2 =
4394 table->initialState.levels[0].mclk.vMPLL_SS =
4396 table->initialState.levels[0].mclk.vMPLL_SS2 =
4399 table->initialState.levels[0].mclk.mclk_value
    [all...]
nislands_smc.h 173 NISLANDS_SMC_SWSTATE initialState;
sislands_smc.h 221 SISLANDS_SMC_SWSTATE initialState;
radeon_rv740_dpm.c 333 table->ACPIState = table->initialState;
radeon_btc_dpm.c 1687 table->driverState = table->initialState;
  /src/sys/lib/libunwind/
DwarfParser.hpp 313 PrologInfo initialState = *results;
357 results->savedRegisters[reg] = initialState.savedRegisters[reg];
533 results->savedRegisters[reg] = initialState.savedRegisters[reg];
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_dpm.c 4846 table->initialState.levels[0].mclk.vDLL_CNTL =
4848 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL =
4850 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
4852 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
4854 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL =
4856 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_1 =
4858 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_2 =
4860 table->initialState.levels[0].mclk.vMPLL_SS =
4862 table->initialState.levels[0].mclk.vMPLL_SS2 =
4865 table->initialState.levels[0].mclk.mclk_value
    [all...]
sislands_smc.h 221 SISLANDS_SMC_SWSTATE initialState;
si_dpm.h 482 RV770_SMC_SWSTATE initialState;
811 NISLANDS_SMC_SWSTATE initialState;

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