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Searched refs:mclk_edc_enable_threshold (Results 1 - 13 of 13) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
ci_dpm.h	`215 u32 mclk_edc_enable_threshold; member in struct:ci_power_info`
rv770_dpm.h	`121 u32 mclk_edc_enable_threshold; member in struct:rv7xx_power_info`
radeon_cypress_dpm.c	`713 if (pl->mclk > pi->mclk_edc_enable_threshold) 1322 if (initial_state->low.mclk > pi->mclk_edc_enable_threshold) 2069 pi->mclk_edc_enable_threshold = 40000;`
radeon_rv770_dpm.c	`652 if (pl->mclk > pi->mclk_edc_enable_threshold) 1103 if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold) 2386 pi->mclk_edc_enable_threshold = 30000;`
radeon_ni_dpm.c	`1772 if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold) 2341 if (pl->mclk > pi->mclk_edc_enable_threshold) 4135 pi->mclk_edc_enable_threshold = 55000; 4139 pi->mclk_edc_enable_threshold = 40000;`
radeon_ci_dpm.c	`2949 if (pi->mclk_edc_enable_threshold && 2950 (memory_clock > pi->mclk_edc_enable_threshold)) 5778 pi->mclk_edc_enable_threshold = 40000;`
radeon_si_dpm.c	`4467 if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold) 5016 if (pl->mclk > pi->mclk_edc_enable_threshold) 7000 pi->mclk_edc_enable_threshold = 40000;`
radeon_btc_dpm.c	`2620 pi->mclk_edc_enable_threshold = 40000;`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c	`1242 uint32_t mclk_edc_enable_threshold = 40000; local in function:iceland_populate_single_memory_level 1301 if ((mclk_edc_enable_threshold != 0) && 1302 (memory_clock > mclk_edc_enable_threshold)) {`
amdgpu_ci_smumgr.c	`1187 uint32_t mclk_edc_enable_threshold = 40000; local in function:ci_populate_single_memory_level 1253 if ((mclk_edc_enable_threshold != 0) && 1254 (memory_clock > mclk_edc_enable_threshold)) {`
amdgpu_tonga_smumgr.c	`975 uint32_t mclk_edc_enable_threshold = 40000; local in function:tonga_populate_single_memory_level 1041 if ((mclk_edc_enable_threshold != 0) && 1042 (memory_clock > mclk_edc_enable_threshold)) {`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
si_dpm.h	`577 u32 mclk_edc_enable_threshold; member in struct:rv7xx_power_info`
amdgpu_si_dpm.c	`4931 if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold) 5480 if (pl->mclk > pi->mclk_edc_enable_threshold) 7392 pi->mclk_edc_enable_threshold = 40000;`

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