NetBSD Cross-Reference & Source Code Search Engine

Home	Sort by: relevance \| last modified time \| path

Full Search

in project(s):

Definition

Symbol

File Path

History

| | Help

Searched refs:mclk_edc_wr_enable_threshold (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
cypress_dpm.h	`84 u32 mclk_edc_wr_enable_threshold; member in struct:evergreen_power_info`
ci_dpm.h	`216 u32 mclk_edc_wr_enable_threshold; member in struct:ci_power_info`
radeon_cypress_dpm.c	`716 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) 2070 eg_pi->mclk_edc_wr_enable_threshold = 40000;`
radeon_ni_dpm.c	`2343 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) 4136 eg_pi->mclk_edc_wr_enable_threshold = 55000; 4140 eg_pi->mclk_edc_wr_enable_threshold = 40000; 4142 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;`
radeon_ci_dpm.c	`2953 if (pi->mclk_edc_wr_enable_threshold && 2954 (memory_clock > pi->mclk_edc_wr_enable_threshold)) 5779 pi->mclk_edc_wr_enable_threshold = 40000;`
radeon_si_dpm.c	`5019 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) 7001 eg_pi->mclk_edc_wr_enable_threshold = 40000; 7003 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;`
radeon_btc_dpm.c	`2621 eg_pi->mclk_edc_wr_enable_threshold = 40000;`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c	`1241 uint32_t mclk_edc_wr_enable_threshold = 40000; local in function:iceland_populate_single_memory_level 1306 if ((mclk_edc_wr_enable_threshold != 0) && 1307 (memory_clock > mclk_edc_wr_enable_threshold)) {`
amdgpu_ci_smumgr.c	`1186 uint32_t mclk_edc_wr_enable_threshold = 40000; local in function:ci_populate_single_memory_level 1258 if ((mclk_edc_wr_enable_threshold != 0) && 1259 (memory_clock > mclk_edc_wr_enable_threshold)) {`
amdgpu_tonga_smumgr.c	`973 uint32_t mclk_edc_wr_enable_threshold = 40000; local in function:tonga_populate_single_memory_level 1046 if ((mclk_edc_wr_enable_threshold != 0) && 1047 (memory_clock > mclk_edc_wr_enable_threshold)) {`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
si_dpm.h	`668 u32 mclk_edc_wr_enable_threshold; member in struct:evergreen_power_info`
amdgpu_si_dpm.c	`5483 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) 7393 eg_pi->mclk_edc_wr_enable_threshold = 40000; 7395 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;`

Completed in 46 milliseconds