| /src/sys/dev/fdt/ |
| dwc_gmac_fdt_subr.c | 48 if (of_getprop_uint32(phandle, "snps,pbl", &pbl) == 0) { 51 if (of_getprop_uint32(phandle, "snps,txpbl", &pbl) == 0) { 54 if (of_getprop_uint32(phandle, "snps,rxpbl", &pbl) == 0) {
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| fdt_spi.c | 206 if (of_getprop_uint32(node, "spi-max-frequency", &val32) == 0) { 220 if (of_getprop_uint32(node, "spi-cs-setup-delay-ns", &val32) == 0) { 223 if (of_getprop_uint32(node, "spi-cs-hold-delay-ns", &val32) == 0) { 226 if (of_getprop_uint32(node, "spi-cs-inactive-delay-ns", &val32) == 0) { 231 if (of_getprop_uint32(node, "spi-rx-bus-width", &val32) == 0) { 241 if (of_getprop_uint32(node, "spi-rx-delay-us", &val32) == 0) { 249 if (of_getprop_uint32(node, "rx-sample-delay-ns", &val32) == 0) { 254 if (of_getprop_uint32(node, "spi-tx-bus-width", &val32) == 0) { 264 if (of_getprop_uint32(node, "spi-tx-delay-us", &val32) == 0) {
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| display_timing.c | 42 of_getprop_uint32(phandle, (n), (v))
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| fdt_iommu.c | 87 if (of_getprop_uint32(phandle, "#iommu-cells", &cells) != 0) { 130 if (of_getprop_uint32(iommu_phandle, "#iommu-cells", &cells)) { 168 if (of_getprop_uint32(phandle, "iommu-map-mask", &map_mask) == 0) { 183 if (of_getprop_uint32(iommu_phandle, "#iommu-cells", &cells)) {
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| fixedregulator.c | 124 if (of_getprop_uint32(phandle, "startup-delay-us", &sc->sc_delay) != 0) 126 of_getprop_uint32(phandle, "regulator-min-microvolt", &sc->sc_min_uvol); 127 of_getprop_uint32(phandle, "regulator-max-microvolt", &sc->sc_max_uvol);
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| fdt_pinctrl.c | 104 if (of_getprop_uint32(OF_parent(xref), "#pinctrl-cells", &pinctrl_cells) != 0) 234 if (of_getprop_uint32(phandle, bias_prop, &val) == 0) { 268 if (of_getprop_uint32(phandle, "drive-strength", &val) == 0)
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| fdt_regulator.c | 70 of_getprop_uint32(phandle, "regulator-enable-ramp-delay", &rc->rc_enable_ramp_delay); 197 if (of_getprop_uint32(rc->rc_phandle, "regulator-min-microvolt", &uvol) == 0) { 201 if (of_getprop_uint32(rc->rc_phandle, "regulator-max-microvolt", &uvol) == 0) {
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| mmc_pwrseq_simple.c | 152 of_getprop_uint32(phandle, "post-power-on-delay-ms", 155 of_getprop_uint32(phandle, "power-off-delay-us",
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| pcfiic_fdt.c | 99 if (of_getprop_uint32(phandle, "clock-frequency", &frequency)) { 142 if (of_getprop_uint32(phandle, "own-address", &own_addr)) {
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| fdt_gpio.c | 95 if (of_getprop_uint32(gc_phandle, "#gpio-cells", &gpio_cells)) 128 if (of_getprop_uint32(gc_phandle, "#gpio-cells", &gpio_cells))
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| fixedfactorclock.c | 106 of_getprop_uint32(phandle, "clock-div", &sc->sc_clk.div); 107 of_getprop_uint32(phandle, "clock-mult", &sc->sc_clk.mult);
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| panel_fdt.c | 103 if (of_getprop_uint32(phandle, "width-mm", &sc->sc_panel.panel_width) || 104 of_getprop_uint32(phandle, "height-mm", &sc->sc_panel.panel_height)){
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| dw_apb_uart.c | 96 if (of_getprop_uint32(phandle, "reg-io-width", ®_iowidth)) { 182 if (of_getprop_uint32(phandle, "reg-io-width", ®_iowidth)) {
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| /src/sys/arch/evbppc/sam460ex/ |
| sam460ex_fdt.c | 93 of_getprop_uint32(child, "cell-index", &idx) == 0 && 141 of_getprop_uint32(root, "#address-cells", &ac); 142 of_getprop_uint32(root, "#size-cells", &sc); 154 of_getprop_uint32(node, "clock-frequency", &info->fi_cpu_freq); 155 of_getprop_uint32(node, "timebase-frequency", 162 of_getprop_uint32(node, "clock-frequency", &info->fi_opb_freq); 167 of_getprop_uint32(node, "clock-frequency", &info->fi_uart_freq);
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| /src/sys/arch/riscv/fdt/ |
| cpus_fdt.c | 49 int ret = of_getprop_uint32(cpus, "timebase-frequency", &tbfreq);
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| /src/sys/arch/arm/nvidia/ |
| tegra_pinmux.c | 141 if (of_getprop_uint32(phandle, "nvidia,pull", &val) == 0) { 145 if (of_getprop_uint32(phandle, "nvidia,tristate", &val) == 0) { 149 if (of_getprop_uint32(phandle, "nvidia,open-drain", &val) == 0) { 153 if (of_getprop_uint32(phandle, "nvidia,lock", &val) == 0) { 157 if (of_getprop_uint32(phandle, "nvidia,io-hv", &val) == 0) { 161 if (of_getprop_uint32(phandle, "nvidia,high-speed-mode", &val) == 0) { 165 if (of_getprop_uint32(phandle, "nvidia,schmitt", &val) == 0) { 169 if (of_getprop_uint32(phandle, "nvidia,drive-type", &val) == 0) { 182 if (of_getprop_uint32(phandle, "nvidia,pull-down-strength", &val) == 0) { 186 if (of_getprop_uint32(phandle, "nvidia,pull-up-strength", &val) == 0) [all...] |
| tegra_com.c | 100 if (of_getprop_uint32(faa->faa_phandle, "reg-shift", ®_shift)) { 171 if (of_getprop_uint32(faa->faa_phandle, "reg-shift", ®_shift)) {
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| /src/sys/arch/riscv/starfive/ |
| jh7110_eqos.c | 80 if (of_getprop_uint32(phandle, 85 if (of_getprop_uint32(phandle, 90 if (of_getprop_uint32(phandle, 95 if (of_getprop_uint32(phandle,
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| /src/sys/arch/hb68k/pg68k/ |
| ph1_machdep.c | 81 if (of_getprop_uint32(chosen, 86 if (of_getprop_uint32(chosen,
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| /src/sys/arch/arm/samsung/ |
| exynos_pinctrl.c | 139 gc->cfg_valid = of_getprop_uint32(phandle, "samsung,pin-function", &gc->cfg) == 0; 140 gc->pud_valid = of_getprop_uint32(phandle, "samsung,pin-pud", &gc->pud) == 0; 141 gc->drv_valid = of_getprop_uint32(phandle, "samsung,pin-drv", &gc->drv) == 0; 142 gc->conpwd_valid = of_getprop_uint32(phandle, "samsung,pin-conpwd", &gc->conpwd) == 0; 143 gc->pudpwd_valid = of_getprop_uint32(phandle, "samsung,pin-pudpwd", &gc->pudpwd) == 0;
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| /src/sys/arch/hb68k/generic/ |
| genintc.c | 147 if (of_getprop_uint32(phandle, 151 if (of_getprop_uint32(phandle, 154 of_getprop_uint32(phandle,
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| /src/sys/arch/arm/nxp/ |
| imx_i2c.c | 80 error = of_getprop_uint32(phandle, "clock-frequency", &freq);
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| /src/sys/arch/riscv/sifive/ |
| fu540_ccache.c | 164 ret = of_getprop_uint32(phandle, "cache-block-size", 171 ret = of_getprop_uint32(phandle, "cache-level", 178 ret = of_getprop_uint32(phandle, "cache-sets", 184 ret = of_getprop_uint32(phandle, "cache-size",
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| /src/sys/dev/ofw/ |
| openfirm.h | 137 int of_getprop_uint32(int, const char *, uint32_t *);
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| /src/sys/arch/arm/ti/ |
| ti_div_clock.c | 181 if (of_getprop_uint32(sc->sc_phandle, "ti,bit-shift", &bit_shift) != 0) 184 if (of_getprop_uint32(sc->sc_phandle, "ti,max-div", &max_div) == 0) {
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