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  /src/external/gpl3/binutils/dist/ld/emulparams/
v850.sh 6 ZDATA_START_ADDR=0x160
v850_rh850.sh 6 ZDATA_START_ADDR=0x160
  /src/external/gpl3/binutils.old/dist/ld/emulparams/
v850.sh 6 ZDATA_START_ADDR=0x160
v850_rh850.sh 6 ZDATA_START_ADDR=0x160
  /src/sys/arch/hpcmips/tx/
tx39spireg.h 35 #define TX39_SPICTRL_REG 0x160
  /src/sys/arch/arm/nvidia/
tegra_pciereg.h 61 #define AFI_PLLE_CONTROL_REG 0x160
tegra124_xusbpad.c 164 for (i = 0x000; i < 0x160; ) {
166 for (j = 0; i < 0x160 && j < 0x10; j += 4, i += 4) {
tegra_soctherm.c 111 { .s_data = { .desc = "MEM1" }, .s_base = 0x160, .s_fuse = 0x15c,
115 { .s_data = { .desc = "PLLX" }, .s_base = 0x1a0, .s_fuse = 0x160,
  /src/sys/arch/ia64/include/
setjmp.h 69 #define J_F28 0x160
  /src/sys/arch/mac68k/include/
psc.h 97 #define PSC_LEV6_ISR 0x160 /* level 6 interrupt status register */
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
dm814.h 21 #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160)
dm816.h 21 #define DM816_GPIO2_CLKCTRL DM816_CLKCTRL_INDEX(0x160)
omap4.h 127 #define OMAP4_MMC5_CLKCTRL OMAP4_CLKCTRL_INDEX(0x160)
omap5.h 89 #define OMAP5_MMC5_CLKCTRL OMAP5_CLKCTRL_INDEX(0x160)
  /src/sys/arch/alpha/pci/
lcareg.h 114 #define LCA_IOC_W_MASK1 (LCA_IOC_BASE + 0x160) /* Window Mask */
  /src/sys/arch/arc/jazz/
rd94.h 65 #define RD94_SYS_DMA3_REGS (RD94SYS+0x160) /* DMA ch0 base address */
  /src/sys/arch/sh3/include/
exception.h 63 #define EXPEVT_TRAPA 0x160 /* Unconditional trap (TRAPA) */
  /src/sys/dev/pcmcia/
if_cnwreg.h 93 #define CNW_EREG_PA 0x160
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 125 #define CM_DSI1PCTL 0x160
  /src/sys/dev/tc/
ioasicreg.h 111 #define IOASIC_LANCE_DECODE IOASIC_SLOT_1_START+0x160
  /src/tests/lib/libcurses/tests/
std_defines 79 assign KEY_C3 0x160
  /src/sys/arch/amiga/amiga/
cc_registers.h 202 #define R_SPR4_POS 0x160
  /src/sys/arch/arm/footbridge/
dc21285reg.h 262 #define UART_DATA 0x160
  /src/sys/arch/arm/sunxi/
sun5i_a13_ccu.c 64 #define IEP_SCLK_CFG_REG 0x160
  /src/sys/arch/arm/ti/
omap2_gpmcreg.h 99 #define GPMC_CONFIG5_5 0x160

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