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  /src/sys/arch/amiga/dev/
acafhreg.h 61 #define ACAFH_POWERUP 0xD
  /src/sys/dev/ic/
msm6242breg.h 53 #define MSM6242B_CONTROL_D 0xD
nec71071reg.h 66 #define NEC71071_TEMPHI 0xD /* Temporary register (high byte) */
am9513reg.h 90 #define AM9513_CM_SOURCE_F3 (0xD << 8)
  /src/sys/arch/hp300/hp300/
clockreg.h 74 #define CLKMSB3 0xD
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
rv_ppsmc.h 47 #define PPSMC_MSG_PowerDownSdma 0xD
arcturus_ppsmc.h 52 #define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xD
smu_v11_0_ppsmc.h 50 #define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xD
smu_v12_0_ppsmc.h 48 #define PPSMC_MSG_PowerDownSdma 0xD // SDMA is power gated by default
vega10_ppsmc.h 55 #define PPSMC_MSG_TransferTableSmu2Dram 0xD
vega12_ppsmc.h 52 #define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xD
vega20_ppsmc.h 51 #define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xD
cz_ppsmc.h 75 #define PPSMC_MSG_SDMAPowerOFF ((uint16_t) 0xD)
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_lrc_reg.h 55 #define GEN12_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT 0xD
  /src/sys/dev/dec/
dzreg.h 124 #define DZ_LPR_B7200 0xD
  /src/sys/dev/qbus/
dhureg.h 120 #define DHU_LPR_B9600 0xD
  /src/sys/external/bsd/drm2/dist/drm/amd/include/ivsrcid/dcn/
irqsrcs_dcn_1_0.h 269 #define DCN_1_0__SRCID__DC_AUX1_GTC_SYNC_LOCK_DONE 0xD // AUX1 GTC sync lock complete AUX1_GTC_SYNC_LOCK_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE6 Level
272 #define DCN_1_0__SRCID__DC_AUX1_GTC_SYNC_ERROR 0xD // AUX1 GTC sync error occurred AUX1_GTC_SYNC_ERROR_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE6 Level
275 #define DCN_1_0__SRCID__DC_AUX2_GTC_SYNC_LOCK_DONE 0xD // AUX2 GTC sync lock complete AUX2_GTC_SYNC_LOCK_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE6 Level
278 #define DCN_1_0__SRCID__DC_AUX2_GTC_SYNC_ERROR 0xD // AUX2 GTC sync error occurred AUX2_GTC_SYNC_ERROR_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE6 Level
281 #define DCN_1_0__SRCID__DC_AUX3_GTC_SYNC_LOCK_DONE 0xD // AUX3 GTC sync lock complete AUX3_GTC_SYNC_LOCK_DONE_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE6 Level
284 #define DCN_1_0__SRCID__DC_AUX3_GTC_SYNC_ERROR 0xD // AUX3 GTC sync error occurred AUX3_GTC_SYNC_ERROR_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE6 Level
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/
amdgpu_rn_clk_mgr_vbios_smu.c 58 #define VBIOSSMC_MSG_EnableTmdp48MHzRefclkPwrDown 0xD
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_acpi.h 231 #define ATIF_FUNCTION_TEMPERATURE_CHANGE_NOTIFICATION 0xD
  /src/sys/dev/pci/
svreg.h 87 SV_DMA_MASTERCLEAR = 0xD,
if_bwfm_pci.h 137 #define MSGBUF_TYPE_EVENT_BUF_POST 0xD
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
amd_acpi.h 228 #define ATIF_FUNCTION_TEMPERATURE_CHANGE_NOTIFICATION 0xD
  /src/sys/arch/ia64/disasm/
disasm_decode.c 300 case 0xC: case 0xD: case 0xE:
566 case 0xD:
870 case 0xD:
1137 case 0x1: case 0x5: case 0x9: case 0xD:
1215 case 0xD:
1441 case 0xD:
1601 case 0xD:
1936 case 0xD:
2079 case 0xD:
2261 case 0xD
    [all...]
  /src/sys/dev/pci/ixgbe/
ixgbe_phy.h 60 #define IXGBE_SFF_IDENTIFIER_QSFP_PLUS 0xD
  /src/sys/external/mit/xen-include-public/dist/xen/include/public/
trace.h 257 #define TRC_HVM_EMUL_PIC_INTACK (TRC_HVM_EMUL + 0xD)

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