| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/ |
| H A D | test_to_hw_instr.cpp | 56 Definition(v0_lo, v2b), Definition(v1_lo, v2b), 65 Definition(v0_lo, v1), 75 Definition(v0_lo, v6b), Operand(v1_lo, v2b), 86 Definition(v0_lo, v2), 100 Definition(v0_lo, v2), 109 Definition(v1_lo, v2b), Definition(v0_lo, v2b), 118 Definition(v1_lo, v2b), Definition(v0_l [all...] |
| H A D | test_assembler.cpp | 50 bld.sopp(aco_opcode::s_branch, Definition(PhysReg(0), s2), 1); 73 bld.sopp(aco_opcode::s_branch, Definition(PhysReg(0), s2), 2); 104 bld.sopp(aco_opcode::s_cbranch_scc0, Definition(PhysReg(0), s2), 2); 141 bld.sopp(aco_opcode::s_branch, Definition(PhysReg(0), s2), 0); 170 bld.sopp(aco_opcode::s_cbranch_execnz, Definition(PhysReg(0), s2), 0); 189 bld.sopp(aco_opcode::s_branch, Definition(PhysReg(0), s2), 1); 193 bld.sopp(aco_opcode::s_branch, Definition(PhysReg(0), s2), 2); 212 bld.sopp(aco_opcode::s_branch, Definition(PhysReg(0), s2), 2); 223 bld.sop1(aco_opcode::p_constaddr_getpc, Definition(PhysReg(0), s2), Operand::zero()); 224 bld.sop2(aco_opcode::p_constaddr_addlo, Definition(PhysRe [all...] |
| H A D | test_insert_nops.cpp | 30 bld.mubuf(aco_opcode::buffer_load_dword, Definition(PhysReg(256), v1), Operand(PhysReg(0), s4), 38 mimg->definitions[0] = Definition(PhysReg(256), v1); 126 bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(), 135 bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(), 145 bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(), 158 bld.writelane(Definition(PhysReg(511), v1), Operand::zero(), Operand::zero(),
|
| H A D | test_hard_clause.cpp | 33 bld.mubuf(aco_opcode::buffer_load_dword, Definition(PhysReg(256), v1), desc_op, 49 bld.mtbuf(aco_opcode::tbuffer_load_format_x, Definition(PhysReg(256), v1), desc_op, 58 bld.flat(aco_opcode::flat_load_dword, Definition(PhysReg(256), v1), 64 bld.global(aco_opcode::global_load_dword, Definition(PhysReg(256), v1), 72 mimg->definitions[0] = Definition(PhysReg(256), v1); 87 bld.smem(aco_opcode::s_load_dword, Definition(PhysReg(0), s1), Operand(PhysReg(0), s2), 95 bld.smem(aco_opcode::s_buffer_load_dword, Definition(PhysReg(0), s1), desc_op, Operand::zero());
|
| H A D | test_regalloc.cpp | 201 bld.pseudo(aco_opcode::p_unit_test, Definition(reg_v0, v1)); 220 Temp scc_tmp = bld.pseudo(aco_opcode::p_unit_test, bld.def(s1, scc), Definition(s0_tmp.id(), PhysReg{0}, s1));
|
| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_lower_to_hw_instr.cpp | 189 emit_vadd32(Builder& bld, Definition def, Operand src0, Operand src1) 204 Definition dst[] = {Definition(dst_reg, v1), Definition(PhysReg{dst_reg + 1}, v1)}; 205 Definition vtmp_def[] = {Definition(vtmp_reg, v1), Definition(PhysReg{vtmp_reg + 1}, v1)}; 303 Definition dst[] = {Definition(dst_reg, v1), Definition(PhysRe [all...] |
| H A D | aco_instruction_selection.cpp | 144 return bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, Definition(dst), mask_lo, base); 164 return bld.vop2(aco_opcode::v_mbcnt_hi_u32_b32, Definition(dst), mask_hi, mbcnt_lo); 166 return bld.vop3(aco_opcode::v_mbcnt_hi_u32_b32_e64, Definition(dst), mask_hi, mbcnt_lo); 181 bld.copy(Definition(dst), src); 185 bld.pseudo(aco_opcode::p_wqm, Definition(dst), src); 286 bld.vop2(aco_opcode::v_lshrrev_b32, Definition(dst), Operand::c32(util_logbase2(b)), a); 300 bld.copy(Definition(dst), a); 307 bld.vop2(aco_opcode::v_lshrrev_b32, Definition(pre_shift_dst), Operand::c32(info.pre_shift), 314 bld.vadd32(Definition(increment_dst), Operand::c32(info.increment), pre_shift_dst); 320 bld.vop3(aco_opcode::v_mul_hi_u32, Definition(multiply_ds [all...] |
| H A D | aco_insert_exec_mask.cpp | 160 for (const Definition& definition : instr->definitions) { 359 exec_mask = bld.sop1(Builder::s_wqm, Definition(exec, bld.lm), bld.def(s1, scc), 370 aco_opcode::p_parallelcopy, Definition(exec, bld.lm), ctx.info[idx].exec.back().first); 388 aco_opcode::p_parallelcopy, Definition(exec, bld.lm), ctx.info[idx].exec.back().first); 395 Definition(exec, bld.lm), ctx.info[idx].exec[0].first, Operand(exec, bld.lm)); 397 bld.sop2(Builder::s_and, Definition(exec, bld.lm), bld.def(s1, scc), 422 bld.copy(Definition(exec, bld.lm), start_exec); 433 bld.sop1(Builder::s_wqm, Definition(exec, bld.lm), bld.def(s1, scc), 481 phi->definitions[0] = Definition(exec, bld.lm); 504 bld.pseudo(aco_opcode::p_parallelcopy, Definition(exe [all...] |
| H A D | aco_insert_NOPs.cpp | 213 for (Definition& def : pred->definitions) { 343 Definition def = instr->definitions[0]; 411 for (Definition def : instr->definitions) { 497 Definition def = instr->definitions[0]; 503 for (Definition def : instr->definitions) { 518 Definition def = instr->definitions[0]; 561 [&check_regs](const Definition& def) -> bool 603 [](const Definition& def) -> bool 611 [](const Definition& def) -> bool 691 v_mov->definitions[0] = Definition(inst [all...] |
| H A D | aco_register_allocation.cpp | 55 void set(const Definition& def) 312 void fill(Definition def) 320 void clear(Definition def) { clear(def.physReg(), def.regClass()); } 721 std::vector<std::pair<Operand, Definition>>& parallelcopies, 725 for (std::pair<Operand, Definition>& copy : parallelcopies) { 742 for (Definition& def : instr->definitions) { 757 for (std::pair<Operand, Definition>& other : parallelcopies) { 782 std::pair<Operand, Definition>& copy = *it; 796 for (std::pair<Operand, Definition>& pc : parallelcopies) { 985 std::vector<std::pair<Operand, Definition>> [all...] |
| H A D | aco_dead_code_analysis.cpp | 89 [&uses](const Definition& def) { return !def.isTemp() || uses[def.tempId()]; }))
|
| H A D | aco_reindex_ssa.cpp | 40 for (Definition& def : instr->definitions) {
|
| H A D | aco_reduce_assign.cpp | 105 create->definitions[0] = Definition(reduceTmp); 147 create->definitions[0] = Definition(vtmp);
|
| H A D | aco_lower_phis.cpp | 114 phi->definitions[0] = Definition(op.getTemp()); 141 Definition dst = Definition(state->outputs[block_idx].getTemp()); 327 insert_before_logical_end(pred, bld.copy(Definition(tmp), phi_src).get_ptr()); 330 Definition(new_phi_src), tmp, Operand::zero())
|
| H A D | aco_live_var_analysis.cpp | 38 for (const Definition& def : instr->definitions) { 58 for (Definition def : instr->definitions) { 117 for (Definition& definition : insn->definitions) { 191 Definition& definition = insn->definitions[0];
|
| H A D | aco_lower_to_cssa.cpp | 50 Definition def; 84 const Definition& def = phi->definitions[0]; 119 ctx.parallelcopies[preds[i]].emplace_back(copy{Definition(tmp), op}); 224 for (const Definition& def : (*it)->definitions) {
|
| H A D | aco_validate.cpp | 167 const Definition& def = instr->definitions[0]; 314 "Wrong Definition type for VALU instruction", instr.get()); 317 "Wrong Definition type for VALU instruction", instr.get()); 375 "Wrong Definition type for SALU instruction", instr.get()); 392 "Definition size does not match operand sizes", instr.get()); 415 for (const Definition& def : instr->definitions) { 421 for (const Definition& def : instr->definitions) 423 "Wrong Definition type for VGPR split_vector", instr.get()); 425 for (const Definition& def : instr->definitions) 434 "Operand and Definition siz [all...] |
| H A D | aco_ssa_elimination.cpp | 35 Definition def; 291 for (Definition& def : instr->definitions)
|
| H A D | aco_ir.h | 430 * Operand and Definition. 888 * Definition Class 893 class Definition final { class in namespace:aco 895 constexpr Definition() function in class:aco::Definition 899 Definition(uint32_t index, RegClass type) noexcept : temp(index, type) {} function in class:aco::Definition 900 explicit Definition(Temp tmp) noexcept : temp(tmp) {} function in class:aco::Definition 901 Definition(PhysReg reg, RegClass type) noexcept : temp(Temp(0, type)) { setFixed(reg); } function in class:aco::Definition 902 Definition(uint32_t tmpId, PhysReg reg, RegClass type) noexcept : temp(Temp(tmpId, type)) function in class:aco::Definition 915 void swapTemp(Definition& other) noexcept { std::swap(temp, other.temp); } 1008 aco::span<Definition> definition [all...] |
| H A D | aco_insert_waitcnt.cpp | 263 for (const Definition& def : instr->definitions) { 603 insert_wait_entry(wait_ctx& ctx, Definition def, wait_event event, bool has_sampler = false) 715 waitcnt_vs->definitions[0] = Definition(sgpr_null, s1); 774 for (Definition def : program->vs_inputs) {
|
| H A D | aco_spill.cpp | 191 for (const Definition& def : instr->definitions) { 345 res->definitions[0] = Definition(new_name); 351 reload->definitions[0] = Definition(new_name); 368 for (const Definition& def : instr->definitions) { 422 for (const Definition& def : instr->definitions) { 1122 phi->definitions[0] = Definition(rename); 1702 create->definitions[0] = Definition(linear_vgpr); 1757 Definition def = (*it)->definitions[0]; 1766 bld.mubuf(opcode, Definition(tmp), scratch_rsrc, Operand(v1), 1786 create->definitions[0] = Definition(linear_vgp [all...] |
| H A D | aco_scheduler.cpp | 212 for (const Definition& def : instr->definitions) 326 for (const Definition& def : current->definitions) { 406 for (const Definition& def : instr->definitions) { 564 for (const Definition& def : instr->definitions) { 928 for (const Definition& def : candidate->definitions) {
|
| H A D | aco_statistics.cpp | 398 for (Definition& def : instr->definitions) { 478 for (Definition def : program->vs_inputs) {
|
| H A D | aco_optimizer_postRA.cpp | 90 for (const Definition& def : instr->definitions) {
|
| H A D | aco_assembler.cpp | 871 Definition def_tmp_lo(branch->definitions[0].physReg(), s1); 873 Definition def_tmp_hi(branch->definitions[0].physReg().advance(4), s1);
|