Searched refs:ENABLE_ADDR_V_CNTL (Results 1 - 16 of 16) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di830_texstate.c297 ENABLE_ADDR_V_CNTL |
H A Di830_reg.h301 #define ENABLE_ADDR_V_CNTL (1<<7) macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di830_texstate.c297 ENABLE_ADDR_V_CNTL |
H A Di830_reg.h301 #define ENABLE_ADDR_V_CNTL (1<<7) macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen2_render.h339 #define ENABLE_ADDR_V_CNTL (1<<7) macro
H A Dgen2_render.c328 ENABLE_ADDR_V_CNTL | TEXCOORD_ADDR_V_MODE(wrap_mode_v) |
3217 ENABLE_ADDR_V_CNTL | TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_CLAMP) |
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di830_reg.h416 #define ENABLE_ADDR_V_CNTL (1<<7) macro
H A Di830_render.c322 texcoordtype | ENABLE_ADDR_V_CNTL |
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h410 #define ENABLE_ADDR_V_CNTL (1<<7) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.h339 #define ENABLE_ADDR_V_CNTL (1<<7) macro
H A Dgen2_render.c325 ENABLE_ADDR_V_CNTL | TEXCOORD_ADDR_V_MODE(wrap_mode_v) |
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di830_reg.h410 #define ENABLE_ADDR_V_CNTL (1<<7) macro
H A Di830_render.c322 texcoordtype | ENABLE_ADDR_V_CNTL |
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di830_reg.h410 #define ENABLE_ADDR_V_CNTL (1<<7) macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_reg.h347 #define ENABLE_ADDR_V_CNTL (1<<7) macro
H A Di830_render.c343 texcoordtype | ENABLE_ADDR_V_CNTL |

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