Searched refs:GEN7_PS_DISPATCH_START_GRF_SHIFT_0 (Results 1 - 13 of 13) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_reg.h263 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 macro
H A Di965_video.c1687 (6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0));
H A Di965_render.c2726 OUT_BATCH((6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0));
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di965_reg.h236 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_reg.h263 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 macro
H A Di965_video.c1688 (6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0));
H A Di965_render.c2726 OUT_BATCH((6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0));
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di965_reg.h236 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen7_render.h1311 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 macro
H A Dgen7_render.c934 OUT_BATCH((kernels[0] ? 4 : kernels[1] ? 6 : 8) << GEN7_PS_DISPATCH_START_GRF_SHIFT_0 |
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen7_render.h1311 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 macro
H A Dgen7_render.c897 OUT_BATCH((kernels[0] ? 4 : kernels[1] ? 6 : 8) << GEN7_PS_DISPATCH_START_GRF_SHIFT_0 |
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_defines.h1242 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 macro

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