| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| H A D | ac_shadowed_regs.c | 120 R_028A40_VGT_GS_MODE,
121 R_028A6C_VGT_GS_OUT_PRIM_TYPE - R_028A40_VGT_GS_MODE + 4,
335 R_028A40_VGT_GS_MODE,
336 R_028A6C_VGT_GS_OUT_PRIM_TYPE - R_028A40_VGT_GS_MODE + 4,
663 R_028A40_VGT_GS_MODE,
664 R_028A6C_VGT_GS_OUT_PRIM_TYPE - R_028A40_VGT_GS_MODE + 4,
1518 set_context_reg_seq_array(cs, R_028A40_VGT_GS_MODE, SET(VgtGsModeGfx9));
2221 set_context_reg_seq_array(cs, R_028A40_VGT_GS_MODE, SET(VgtGsModeNv10));
2920 set_context_reg_seq_array(cs, R_028A40_VGT_GS_MODE, SET(VgtGsModeGfx103));
|
| /xsrc/external/mit/MesaLib.old/src/gallium/drivers/r600/ |
| H A D | egd_tables.h | 862 {13284, R_028A40_VGT_GS_MODE, 5, 211},
|
| /xsrc/external/mit/MesaLib/src/gallium/drivers/r600/ |
| H A D | egd_tables.h | 862 {13284, R_028A40_VGT_GS_MODE, 5, 211},
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| H A D | evergreen_compute.c | 1162 r600_store_context_reg(cb, R_028A40_VGT_GS_MODE,
|
| H A D | r600d.h | 911 #define R_028A40_VGT_GS_MODE 0x028A40 macro
1875 #define R_028A40_VGT_GS_MODE 0x028A40 macro
3250 #define R_028A40_VGT_GS_MODE 0x028A40 macro
|
| H A D | evergreend.h | 1025 #define R_028A40_VGT_GS_MODE 0x028A40 macro
|
| H A D | r600_state.c | 1955 radeon_set_context_reg(cs, R_028A40_VGT_GS_MODE, v2);
2356 r600_store_value(cb, 0); /* R_028A40_VGT_GS_MODE, 0); */
|
| H A D | evergreen_state.c | 2661 radeon_set_context_reg(cs, R_028A40_VGT_GS_MODE, v2);
2790 r600_store_value(cb, 0); /* R_028A40_VGT_GS_MODE */
3211 r600_store_value(cb, 0); /* R_028A40_VGT_GS_MODE */
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| H A D | evergreen_compute.c | 1194 r600_store_context_reg(cb, R_028A40_VGT_GS_MODE,
|
| H A D | r600d.h | 911 #define R_028A40_VGT_GS_MODE 0x028A40 macro
1875 #define R_028A40_VGT_GS_MODE 0x028A40 macro
3250 #define R_028A40_VGT_GS_MODE 0x028A40 macro
|
| H A D | evergreend.h | 1025 #define R_028A40_VGT_GS_MODE 0x028A40 macro
|
| H A D | r600_state.c | 1958 radeon_set_context_reg(cs, R_028A40_VGT_GS_MODE, v2);
2359 r600_store_value(cb, 0); /* R_028A40_VGT_GS_MODE, 0); */
|
| H A D | evergreen_state.c | 2667 radeon_set_context_reg(cs, R_028A40_VGT_GS_MODE, v2);
2796 r600_store_value(cb, 0); /* R_028A40_VGT_GS_MODE */
3217 r600_store_value(cb, 0); /* R_028A40_VGT_GS_MODE */
|
| /xsrc/external/mit/MesaLib.old/src/amd/common/ |
| H A D | sid_tables.h | 1170 {22391, R_028A40_VGT_GS_MODE, 15, 1724},
1681 {22391, R_028A40_VGT_GS_MODE, 15, 2903},
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state_shaders.c | 969 radeon_opt_set_context_reg(sctx, R_028A40_VGT_GS_MODE,
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_pipeline.c | 2954 radeon_set_context_reg(ctx_cs, R_028A40_VGT_GS_MODE, vgt_gs_mode);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state_shaders.c | 1355 radeon_opt_set_context_reg(sctx, R_028A40_VGT_GS_MODE, SI_TRACKED_VGT_GS_MODE,
|
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_pipeline.c | 4394 radeon_set_context_reg(ctx_cs, R_028A40_VGT_GS_MODE, vgt_gs_mode);
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/common/ |
| H A D | gfx9d.h | 5925 #define R_028A40_VGT_GS_MODE 0x028A40 macro
|
| H A D | sid.h | 7605 #define R_028A40_VGT_GS_MODE 0x028A40 macro
|
| /xsrc/external/mit/MesaLib/src/amd/common/ |
| H A D | amdgfxregs.h | 11012 #define R_028A40_VGT_GS_MODE 0x028A40 macro
[all...] |