| /xsrc/external/mit/MesaLib/dist/src/intel/common/ |
| intel_disasm.h | 34 const void *assembly, int start, FILE *out);
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| intel_disasm.c | 42 const void *assembly, int start)
48 const brw_inst *insn = assembly + offset;
68 const void *assembly, int start, FILE *out)
70 int end = intel_disasm_find_end(devinfo, assembly, start);
79 brw_validate_instructions(devinfo, assembly, start, end, disasm_info);
83 brw_label_assembly(devinfo, assembly, start, end, mem_ctx);
97 brw_disassemble(devinfo, assembly, start_offset, end_offset,
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| /xsrc/external/mit/MesaLib/dist/src/intel/tools/ |
| i965_disasm.c | 60 struct util_dynarray assembly = {}; local
69 util_dynarray_append(&assembly, uint32_t, temp[0]);
70 util_dynarray_append(&assembly, uint32_t, temp[1]);
77 util_dynarray_append(&assembly, uint32_t, temp[0]);
78 util_dynarray_append(&assembly, uint32_t, temp[1]);
86 *end = assembly.size;
87 return assembly.data;
94 void *assembly; local
104 assembly = malloc(*end + 1);
105 if (assembly == NULL
152 void *assembly = NULL; local
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/intel/common/ |
| gen_disasm.h | 37 const void *assembly, int start, FILE *out);
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| gen_disasm.c | 46 const void *assembly, int start)
53 const brw_inst *insn = assembly + offset;
72 gen_disasm_disassemble(struct gen_disasm *disasm, const void *assembly,
76 int end = gen_disasm_find_end(disasm, assembly, start);
85 brw_validate_instructions(devinfo, assembly, start, end, disasm_info);
99 brw_disassemble(devinfo, assembly, start_offset, end_offset, out);
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/tools/ |
| i965_disasm.c | 49 void *assembly; local
55 assembly = malloc(*end + 1);
56 if (assembly == NULL)
59 size = fread(assembly, *end, 1, fp);
62 free(assembly);
65 return assembly;
105 void *assembly = NULL; local
172 assembly = i965_disasm_read_binary(fp, &end);
173 if (!assembly) {
182 /* Disassemble i965 instructions from buffer assembly */
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/valhall/ |
| test-assembly.py | 32 def positive_test(machine, assembly):
35 val = parse_asm(assembly)
42 def negative_test(assembly):
44 parse_asm(assembly)
67 (machine, assembly) = case.split(' ')
68 record_case(case, positive_test(machine, assembly))
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/ |
| iris_program_cache.c | 28 * takes care of uploading shader assembly into a BO for use on the GPU.
140 * Look for an existing entry in the cache that has identical assembly code.
143 * distinct shaders (from an API perspective) may compile to the same assembly
148 const void *assembly,
154 memcmp(existing->map, assembly, assembly_size) == 0)
165 const void *assembly,
177 find_existing_assembly(cache, assembly, prog_data->program_size);
186 pipe_resource_reference(&shader->assembly.res, existing->assembly.res);
187 shader->assembly.offset = existing->assembly.offset
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/ |
| iris_program_cache.c | 28 * takes care of uploading shader assembly into a BO for use on the GPU.
105 pipe_resource_reference(&shader->assembly.res, NULL);
158 const void *assembly)
163 &shader->assembly.offset, &shader->assembly.res,
165 memcpy(shader->map, assembly, shader->prog_data->program_size);
167 struct iris_resource *res = (void *) shader->assembly.res;
169 shader->assembly.offset +
211 struct iris_bo *bo = iris_resource_bo(shader->assembly.res);
213 iris_bo_offset_from_base_address(bo) + shader->assembly.offset
[all...] |
| iris_disk_cache.c | 105 * 1. Prog data (must come first because it has the assembly size)
106 * 2. Assembly code
180 const void *assembly; local
189 assembly = blob_read_bytes(&blob, prog_data->program_size);
251 cache_id, key_size, prog_key, assembly);
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_disasm_info.h | 68 dump_assembly(void *assembly, struct disasm_info *disasm);
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| brw_disasm_info.c | 34 dump_assembly(void *assembly, struct disasm_info *disasm)
76 brw_disassemble(devinfo, assembly, start_offset, end_offset, stderr);
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| brw_vec4_tcs.cpp | 388 const unsigned *assembly; local
487 assembly = g.get_assembly();
501 assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
505 return assembly;
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| brw_shader.cpp | 1239 const unsigned *assembly; local
1347 assembly = g.get_assembly();
1360 assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
1364 return assembly;
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| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_disasm_info.h | 68 dump_assembly(void *assembly, int start_offset, int end_offset,
|
| brw_disasm_info.c | 34 dump_assembly(void *assembly, int start_offset, int end_offset,
43 brw_label_assembly(devinfo, assembly, start_offset, end_offset, mem_ctx);
84 brw_disassemble(devinfo, assembly, start_offset, end_offset,
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| brw_eu.cpp | 469 const void *assembly, int start, int end, void *mem_ctx)
476 const brw_inst *inst = (const brw_inst *) ((const char *) assembly + offset);
516 const void *assembly, int start, int end, FILE *out)
520 brw_label_assembly(devinfo, assembly, start, end, mem_ctx);
522 brw_disassemble(devinfo, assembly, start, end, root_label, out);
529 const void *assembly, int start, int end,
535 const brw_inst *insn = (const brw_inst *)((char *)assembly + offset);
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| brw_vec4_tcs.cpp | 372 const unsigned *assembly; local
487 assembly = g.get_assembly();
502 assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
508 return assembly;
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| brw_shader.cpp | 1344 const unsigned *assembly; local
1451 assembly = g.get_assembly();
1464 assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
1470 return assembly;
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| sfn_debug.h | 52 assembly = 1 << 8, enumerator in enum:r600::SfnLog::LogFlag
|
| sfn_debug.cpp | 62 {"cc", SfnLog::cc, "Log R600 IR to assembly code creation"},
68 {"ass", SfnLog::assembly, "Log IR to assembly conversion"},
|
| sfn_ir_to_assembly.cpp | 170 sfn_log << SfnLog::assembly << "Emit from '" << *i << "\n";
206 sfn_log << SfnLog::assembly << " Prepare " << *addr << " to address register\n";
246 sfn_log << SfnLog::assembly << " Have " << m_nliterals_in_group.size() << " inject a last op (nop)\n";
324 sfn_log << SfnLog::assembly << " Current address register is " << *m_last_addr << "\n";
327 sfn_log << SfnLog::assembly << " Current dst register is " << *dst << "\n";
331 sfn_log << SfnLog::assembly << " Clear address register (was " << *m_last_addr << "\n";
692 R600_ERR("shader_from_nir: Error creating tex assembly instruction\n");
770 R600_ERR("shader_from_nir: Error creating tex assembly instruction\n");
776 R600_ERR("shader_from_nir: Error creating tex assembly instruction\n");
840 R600_ERR("shader_from_nir: Error creating SCRATCH_WR assembly instruction\n")
1097 sfn_log << SfnLog::assembly << " mova_int, "; member in class:r600::SfnLog
1119 sfn_log << SfnLog::assembly << " mova_int, "; member in class:r600::SfnLog
1129 sfn_log << SfnLog::assembly << "\\n"; member in class:r600::SfnLog
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/ |
| crocus_program_cache.c | 28 * takes care of uploading shader assembly into a BO for use on the GPU.
116 * Look for an existing entry in the cache that has identical assembly code.
119 * distinct shaders (from an API perspective) may compile to the same assembly
124 const void *assembly, unsigned assembly_size)
132 if (memcmp(map + existing->offset, assembly, assembly_size) == 0)
189 const void *key, const void *assembly, uint32_t asm_size,
200 cache, ice->shaders.cache_bo_map, assembly, asm_size);
215 memcpy(ice->shaders.cache_bo_map + shader->offset, assembly, asm_size);
|
| crocus_disk_cache.c | 106 * 1. Prog data (must come first because it has the assembly size)
107 * 2. Assembly code
166 const void *assembly; local
174 assembly = blob_read_bytes(&blob, prog_data->program_size);
220 crocus_upload_shader(ice, stage, key_size, prog_key, assembly,
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/ |
| glsl_scraper.py | 139 (spirv, assembly) = self.__run_glslang()
141 self.assembly = str(assembly, 'utf-8')
155 f.write('/* SPIR-V Assembly:\n')
157 for line in self.assembly.splitlines():
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