Searched refs:block_pool (Results 1 - 21 of 21) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/tests/
H A Dstate_pool_padding.c38 /* Get the size of the underlying block_pool */
39 struct anv_block_pool *bp = &state_pool.block_pool;
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/tests/
H A Dstate_pool_padding.c41 /* Get the size of the underlying block_pool */
42 struct anv_block_pool *bp = &state_pool.block_pool;
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A DgenX_blorp_exec.c67 &cmd_buffer->device->surface_state_pool.block_pool, ss_offset);
87 .buffer = cmd_buffer->device->surface_state_pool.block_pool.bo,
159 .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
H A Danv_batch_chain.c503 .bo = anv_binding_table_pool(cmd_buffer->device)->block_pool.bo,
681 state.map = anv_block_pool_map(&anv_binding_table_pool(device)->block_pool,
688 *state_offset = device->surface_state_pool.block_pool.start_address -
689 device->binding_table_pool.block_pool.start_address - bt_block->offset;
1217 assert(last_pool_center_bo_offset <= pool->block_pool.center_bo_offset);
1218 uint32_t delta = pool->block_pool.center_bo_offset - last_pool_center_bo_offset;
1236 assert(last_pool_center_bo_offset <= pool->block_pool.center_bo_offset);
1237 uint32_t delta = pool->block_pool.center_bo_offset - last_pool_center_bo_offset;
1246 if (relocs->reloc_bos[i] == pool->block_pool.bo) {
1260 write_reloc(pool->block_pool
[all...]
H A Danv_allocator.c923 VkResult result = anv_block_pool_init(&pool->block_pool, device,
932 anv_block_pool_finish(&pool->block_pool);
954 anv_block_pool_finish(&pool->block_pool);
959 struct anv_block_pool *block_pool,
978 return anv_block_pool_alloc(block_pool, state_size, padding);
986 offset = anv_block_pool_alloc(block_pool, block_size, padding);
1041 state_i->map = anv_block_pool_map(&pool->block_pool, state_i->offset);
1170 &pool->block_pool,
1182 state->map = anv_block_pool_map(&pool->block_pool, offset);
1217 offset = anv_block_pool_alloc_back(&pool->block_pool,
958 anv_fixed_size_state_pool_alloc_new(struct anv_fixed_size_state_pool * pool,struct anv_block_pool * block_pool,uint32_t state_size,uint32_t block_size,uint32_t * padding) argument
[all...]
H A DgenX_cmd_buffer.c87 (struct anv_address) { device->dynamic_state_pool.block_pool.bo, 0 };
96 (struct anv_address) { device->instruction_state_pool.block_pool.bo, 0 };
134 .bo = device->surface_state_pool.block_pool.bo,
838 .bo = cmd_buffer->device->surface_state_pool.block_pool.bo,
1525 primary->device->surface_state_pool.block_pool.bo;
2023 .bo = cmd_buffer->dynamic_state_stream.state_pool->block_pool.bo,
2109 .bo = pipeline->device->dynamic_state_pool.block_pool.bo,
2504 .bo = pipeline->device->dynamic_state_pool.block_pool.bo,
2567 .bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
2802 .bo = cmd_buffer->device->dynamic_state_pool.block_pool
[all...]
H A Danv_cmd_buffer.c993 .bo = cmd_buffer->dynamic_state_stream.state_pool->block_pool.bo,
H A Danv_device.c2074 if (get_bo_from_pool(&ret_bo, &device->dynamic_state_pool.block_pool, address))
2076 if (get_bo_from_pool(&ret_bo, &device->instruction_state_pool.block_pool, address))
2078 if (get_bo_from_pool(&ret_bo, &device->binding_table_pool.block_pool, address))
2080 if (get_bo_from_pool(&ret_bo, &device->surface_state_pool.block_pool, address))
H A Danv_blorp.c727 .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
H A Danv_private.h752 struct anv_block_pool block_pool; member in struct:anv_state_pool
783 /* The block_pool functions exported for testing only. The block pool should
835 * of block_pool except that each block is its own BO.
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A DgenX_blorp_exec.c90 &cmd_buffer->device->surface_state_pool.block_pool, ss_offset, 8);
116 .buffer = cmd_buffer->device->surface_state_pool.block_pool.bo,
191 .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
H A Danv_batch_chain.c562 .bo = pool->block_pool.bo,
1378 assert(last_pool_center_bo_offset <= pool->block_pool.center_bo_offset);
1379 uint32_t delta = pool->block_pool.center_bo_offset - last_pool_center_bo_offset;
1398 assert(last_pool_center_bo_offset <= pool->block_pool.center_bo_offset);
1399 uint32_t delta = pool->block_pool.center_bo_offset - last_pool_center_bo_offset;
1408 if (relocs->reloc_bos[i] == pool->block_pool.bo) {
1422 write_reloc(pool->block_pool.device,
1525 anv_bo_unwrap(cmd_buffer->device->surface_state_pool.block_pool.bo);
1581 ss_pool->block_pool.bo,
1605 cmd_buffer->last_ss_pool_center = ss_pool->block_pool
[all...]
H A Danv_allocator.c841 VkResult result = anv_block_pool_init(&pool->block_pool, device, name,
851 anv_block_pool_finish(&pool->block_pool);
873 anv_block_pool_finish(&pool->block_pool);
878 struct anv_block_pool *block_pool,
897 return anv_block_pool_alloc(block_pool, state_size, padding);
905 offset = anv_block_pool_alloc(block_pool, block_size, padding);
960 state_i->map = anv_block_pool_map(&pool->block_pool,
1091 &pool->block_pool,
1103 state->map = anv_block_pool_map(&pool->block_pool, offset, alloc_size);
1141 offset = anv_block_pool_alloc_back(&pool->block_pool,
877 anv_fixed_size_state_pool_alloc_new(struct anv_fixed_size_state_pool * pool,struct anv_block_pool * block_pool,uint32_t state_size,uint32_t block_size,uint32_t * padding) argument
[all...]
H A DgenX_cmd_buffer.c152 (struct anv_address) { device->dynamic_state_pool.block_pool.bo, 0 };
161 (struct anv_address) { device->instruction_state_pool.block_pool.bo, 0 };
207 .bo = device->surface_state_pool.block_pool.bo,
1088 .bo = cmd_buffer->device->surface_state_pool.block_pool.bo,
1985 primary->device->surface_state_pool.block_pool.bo;
2635 .bo = cmd_buffer->device->instruction_state_pool.block_pool.bo,
3063 .bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
3070 .bo = cmd_buffer->device->instruction_state_pool.block_pool.bo,
3264 cmd_buffer->device->dynamic_state_pool.block_pool.bo);
3836 .bo = cmd_buffer->device->dynamic_state_pool.block_pool
[all...]
H A Danv_device.c2821 if (get_bo_from_pool(&ret_bo, &device->dynamic_state_pool.block_pool, address))
2823 if (get_bo_from_pool(&ret_bo, &device->instruction_state_pool.block_pool, address))
2825 if (get_bo_from_pool(&ret_bo, &device->binding_table_pool.block_pool, address))
2827 if (get_bo_from_pool(&ret_bo, &device->surface_state_pool.block_pool, address))
2870 buf->base.gpu = pool->block_pool.bo->offset + buf->state.offset;
H A Danv_cmd_buffer.c1424 .bo = cmd_buffer->dynamic_state_stream.state_pool->block_pool.bo,
H A Danv_blorp.c913 .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
H A Danv_private.h670 struct anv_block_pool block_pool; member in struct:anv_state_pool
710 /* The block_pool functions exported for testing only. The block pool should
773 * of block_pool except that each block is its own BO.
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D19.0.0.rst2043 - anv: Update usage of block_pool->bo.
H A D19.3.0.rst2775 - anv/block_pool: Align anv_block_pool state to 64 bits.
H A D20.0.0.rst1749 - anv/block_pool: Ensure allocations have contiguous maps

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