| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/ |
| H A D | disasm-a3xx.c | 430 instr_cat5_t *cat5 = &instr->cat5; local in function:print_instr_cat5 433 if (cat5->is_3d) fprintf(ctx->out, ".3d"); 434 if (cat5->is_a) fprintf(ctx->out, ".a"); 435 if (cat5->is_o) fprintf(ctx->out, ".o"); 436 if (cat5->is_p) fprintf(ctx->out, ".p"); 437 if (cat5->is_s) fprintf(ctx->out, ".s"); 438 if (cat5->is_s2en) fprintf(ctx->out, ".s2en"); 442 switch (_OPC(5, cat5->opc)) { 447 fprintf(ctx->out, "(%s)", type[cat5 [all...] |
| H A D | ir3.c | 457 instr_cat5_t *cat5 = ptr; local in function:emit_cat5 482 cat5->full = ! (src1->flags & IR3_REG_HALF); 483 cat5->src1 = reg(src1, info, instr->repeat, IR3_REG_HALF); 490 cat5->s2en.src2 = reg(src2, info, instr->repeat, IR3_REG_HALF); 493 cat5->s2en.src3 = reg(samp_tex, info, instr->repeat, IR3_REG_HALF); 494 iassert(!(instr->cat5.samp | instr->cat5.tex)); 498 cat5->norm.src2 = reg(src2, info, instr->repeat, IR3_REG_HALF); 500 cat5->norm.samp = instr->cat5 [all...] |
| H A D | instr-a3xx.h | 796 instr_cat5_t cat5; member in union:PACKED 868 case 5: return instr->cat5.opc;
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| H A D | ir3_cp.c | 639 instr->cat5.samp = samp->regs[1]->iim_val; 640 instr->cat5.tex = tex->regs[1]->iim_val;
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| H A D | ir3_compiler_nir.c | 455 dst[0]->cat5.type = TYPE_F32; 459 dst[0]->cat5.type = TYPE_F32; 1271 offset->cat5.type = TYPE_F32; 2764 compile_assert(ctx, sam->cat5.tex < ARRAY_SIZE(alt_tex_state)); 2766 if (alt_tex_state[sam->cat5.tex] == 0) { 2768 alt_tex_state[sam->cat5.tex] = tex_idx++; 2769 so->astc_srgb.orig_idx[idx++] = sam->cat5.tex; 2773 sam->cat5.tex = alt_tex_state[sam->cat5.tex];
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| H A D | ir3.h | 130 /* used for cat5 instructions, but also for internal/IR level 248 } cat5; member in union:ir3_instruction::__anond9a07c73060a 1311 /* cat5 instructions: */ 1340 sam->cat5.type = type;
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| H A D | ir3_ra.c | 1008 instr->cat5.type = half_type(instr->cat5.type);
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| H A D | ir3_print.c | 177 is_tex(instr) ? instr->cat5.tex_base : instr->cat6.base); 311 mesa_log_stream_printf(stream, " (%s)(", type_name(instr->cat5.type)); 345 mesa_log_stream_printf(stream, ", s#%d", instr->cat5.samp); 348 instr->cat5.samp & 0xf, 349 instr->cat5.samp >> 4); 352 mesa_log_stream_printf(stream, ", s#%d, t#%d", instr->cat5.samp, 353 instr->cat5.tex);
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| H A D | ir3.c | 697 instr->cat5.type = half_type(instr->cat5.type); 699 instr->cat5.type = full_type(instr->cat5.type);
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| H A D | ir3_parser.y | 191 * find, given that various different cat5 tex instructions can have 946 cat5_opc_dsxypp: T_OP_DSXPP_1 { new_instr(OPC_DSXPP_1)->cat5.type = TYPE_F32; } 947 | T_OP_DSYPP_1 { new_instr(OPC_DSYPP_1)->cat5.type = TYPE_F32; } 983 | '.' T_BASE { instr->flags |= IR3_INSTR_B; instr->cat5.tex_base = $2; } 987 cat5_samp: T_SAMP { instr->cat5.samp = $1; } 988 cat5_tex: T_TEX { if (instr->flags & IR3_INSTR_B) instr->cat5.samp |= ($1 << 4); else instr->cat5.tex = $1; } 989 cat5_type: '(' type ')' { instr->cat5.type = $2; }
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| H A D | ir3_compiler_nir.c | 480 dst[0]->cat5.type = TYPE_F32; 484 dst[0]->cat5.type = TYPE_F32; 489 dst[0]->cat5.type = TYPE_F32; 494 dst[0]->cat5.type = TYPE_F32; 1202 sam->cat5.tex_base = info.base; 1203 sam->cat5.samp = info.combined_idx; 1758 offset->cat5.type = TYPE_F32; 3844 compile_assert(ctx, sam->cat5.tex < ARRAY_SIZE(alt_tex_state)); 3846 if (alt_tex_state[sam->cat5.tex] == 0) { 3848 alt_tex_state[sam->cat5 [all...] |
| H A D | ir3_cp.c | 637 instr->cat5.samp = samp->iim_val; 638 instr->cat5.tex = tex->iim_val;
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| H A D | ir3_validate.c | 286 validate_reg_size(ctx, instr->dsts[0], instr->cat5.type);
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| H A D | ir3.h | 155 /* used for cat5 instructions, but also for internal/IR level 285 /* (cat5/cat6) Bindless */ 287 /* (cat5/cat6) nonuniform */ 289 /* (cat5-only) Get some parts of the encoding from a1.x */ 333 } cat5; member in union:ir3_instruction::__anon3fdcb7e6050a 2102 /* cat5 instructions: */ 2141 sam->cat5.type = type;
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/isa/ |
| H A D | encode.c | 169 /* some cat5 have zero src regs, in which case 'FULL' is false */ 200 assert(!(instr->cat5.samp | instr->cat5.tex));
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/drivers/freedreno/ |
| H A D | ir3-notes.rst | 260 Note that cat5 (texture sample) instructions are the notable exception, not
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| /xsrc/external/mit/MesaLib/dist/docs/drivers/freedreno/ |
| H A D | ir3-notes.rst | 260 Note that cat5 (texture sample) instructions are the notable exception, not
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| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 21.0.0.rst | 2897 - freedreno/ir3/parser: Fixup cat5 s2en instructions 2906 - freedreno/ir3: Add cat5/cat6 nonuniform flag
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| H A D | 19.1.0.rst | 4144 - freedreno/ir3: more emit-cat5 fixes
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| /xsrc/external/mit/MesaLib/dist/ |
| H A D | .pick_status.json | 30937 "description": "freedreno: Fix the uniform/nonuniform handling for cat5 bindful modes.", [all...] |