Searched refs:clock (Results 1 - 25 of 603) sorted by relevance

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/xsrc/external/mit/oclock/dist/
H A DClock.c30 * a NeWS clone clock
50 #define offset(field) XtOffsetOf(ClockRec, clock.field)
87 static double clock_to_angle ( double clock );
90 # define BORDER_SIZE(w) ((w)->clock.border_size)
95 # define JEWEL_SIZE(w) ((w)->clock.jewel_size)
155 if (w->clock.transparent)
161 myXGCV.foreground = w->clock.minute;
162 w->clock.minuteGC = XtGetGC(gnew, valuemask, &myXGCV);
164 myXGCV.foreground = w->clock.hour;
165 w->clock
415 clock_to_angle(double clock) argument
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/xsrc/external/mit/xclock/dist/
H A DClock.c139 #define offset(field) XtOffsetOf(ClockRec, clock.field)
271 { /* clock fields */
505 if (w->clock.brief) {
506 if (w->clock.twentyfour) {
524 else if (w->clock.utime) {
533 else if (*w->clock.strftime) {
541 if (0 < strftime(ctime, STRFTIME_BUFF_SIZE - 1, w->clock.strftime, tm)) {
549 else if (w->clock.twentyfour)
569 if (w->clock.font != NULL)
570 myXGCV.font = w->clock
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H A DClockP.h75 /* New fields for the clock widget instance record */
146 #define ClockFgPixel(c) ((c)->clock.fg_color.pixel)
148 #define ClockFgPixel(c) ((c)->clock.fgpixel)
155 ClockPart clock; member in struct:_ClockRec
H A DMakefile.am48 clock.bit
/xsrc/external/mit/xf86-video-s3virge/dist/src/
H A Ds3v_i2c.c67 s3v_I2CPutBits(I2CBusPtr b, int clock, int data) argument
72 if(clock) reg |= 0x1;
76 /*ErrorF("s3v_I2CPutBits: %d %d\n", clock, data); */
80 s3v_I2CGetBits(I2CBusPtr b, int *clock, int *data) argument
87 *clock = reg & 0x4;
90 /*ErrorF("s3v_I2CGetBits: %d %d\n", *clock, *data);*/
/xsrc/external/mit/xf86-video-trident/dist/src/
H A Dtrident_i2c.c18 TRIDENTI2CPutBits(I2CBusPtr b, int clock, int data) { argument
28 if(clock) reg |= 2;
33 ErrorF("TRIDENTI2CPutBits: %d %d\n", clock, data);
38 TRIDENTI2CGetBits(I2CBusPtr b, int *clock, int *data) { argument
50 *clock = (reg & 0x02) != 0;
53 ErrorF("TRIDENTI2CGetBits: %d %d\n", *clock, *data);
H A Dtrident_pll.c59 TGUISetClock(ScrnInfoPtr pScrn, int clock, CARD8 *a, CARD8 *b) argument
77 if (clock >= 100000) startk = 0; else
78 if (clock >= 50000) startk = 1; else
84 if (clock > 50000) startk = 1; else
88 freq = clock;
120 FatalError("Unable to set programmable clock.\n"
121 "Frequency %d is not a valid clock.\n"
122 "Please modify XF86Config for a new clock.\n",
139 clock/1000., p, q, r);
143 TridentFindClock(ScrnInfoPtr pScrn, int clock) argument
279 TGUISetMCLK(ScrnInfoPtr pScrn,int clock,CARD8 * a,CARD8 * b) argument
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/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dxgi_dac.h39 void XGICalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned *vclk);
H A Dxgi_vga.c70 int clock = mode->Clock; local in function:XG40Init
149 if (clock < 100000)
151 else if (clock < 200000)
153 else if (clock < 250000)
196 if (compute_vclk(clock, &num, &denum, &div, &sbit, &scale)) {
207 /* if compute_vclk cannot handle the request clock try XGICalcClock! */
208 XGICalcClock(pScrn, clock, 2, vclk);
227 if ( (pXGI->Chipset == PCI_CHIP_XGIXG40) && (clock > 150000) ) { /* enable two-pixel mode */
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_display.c459 /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
461 static void i8xx_clock(int refclk, intel_clock_t *clock) argument
463 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
464 clock->p = clock->p1 * clock->p2;
465 clock->vco = refclk * clock
471 i9xx_clock(int refclk,intel_clock_t * clock) argument
480 igd_clock(int refclk,intel_clock_t * clock) argument
488 intel_clock(I830Ptr pI830,int refclk,intel_clock_t * clock) argument
500 i830PrintPll(ScrnInfoPtr pScrn,char * prefix,intel_clock_t * clock) argument
541 i830PllIsValid(xf86CrtcPtr crtc,intel_clock_t * clock) argument
578 intel_clock_t clock; local in function:intel_find_pll_i8xx_and_i9xx
636 intel_clock_t clock; local in function:intel_find_pll_g4x
1519 intel_clock_t clock; local in function:i830_crtc_mode_set
2202 intel_clock_t clock; local in function:i830_crtc_clock_get
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/xsrc/external/mit/xf86-video-savage/dist/src/
H A Dsavage_i2c.c38 SavageI2CPutBits(I2CBusPtr b, int clock, int data) argument
48 if(clock) reg |= 0x1;
52 /*ErrorF("SavageI2CPutBits: %d %d\n", clock, data); */
56 SavageI2CGetBits(I2CBusPtr b, int *clock, int *data) argument
68 *clock = reg & 0x4;
71 /*ErrorF("SavageI2CGetBits: %d %d\n", *clock, *data); */
/xsrc/external/mit/xf86-video-siliconmotion/dist/src/
H A Dsmi_i2c.c43 SMI_I2CPutBits(I2CBusPtr b, int clock, int data) argument
48 if (clock) reg |= 0x01;
55 SMI_I2CGetBits(I2CBusPtr b, int *clock, int *data) argument
60 *clock = reg & 0x04;
H A Dsmi_501.c104 save->clock.value = READ_SCR(pSmi, save->current_clock);
207 mode->clock.f.m_select = x_select;
208 mode->clock.f.m_divider = x_divider;
209 mode->clock.f.m_shift = x_shift;
217 mode->clock.f.m1_select = x_select;
218 mode->clock.f.m1_divider = x_divider;
219 mode->clock.f.m1_shift = x_shift;
240 MSOCClockRec clock; local in function:SMI501_WriteMode_common
247 clock.value = READ_SCR(pSmi, mode->current_clock);
250 clock
287 MSOCClockRec clock; local in function:SMI501_WriteMode_lcd
326 MSOCClockRec clock; local in function:SMI501_WriteMode_crt
451 SMI501_FindClock(double clock,int32_t max_divider,Bool has1xclck,int32_t * x2_1xclck,int32_t * x2_select,int32_t * x2_divider,int32_t * x2_shift) argument
497 SMI501_FindMemClock(double clock,int32_t * x1_select,int32_t * x1_divider,int32_t * x1_shift) argument
533 SMI501_FindPLLClock(double clock,int32_t * m,int32_t * n,int32_t * xclck) argument
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/xsrc/external/mit/xf86-video-neomagic/dist/src/
H A Dneo_i2c.c53 neo_I2CPutBits(I2CBusPtr b, int clock, int data) { argument
60 if(clock) reg |= 1;
63 /*ErrorF("neo_I2CPutBits: %d %d\n", clock, data); */
67 neo_I2CGetBits(I2CBusPtr b, int *clock, int *data) { argument
72 *clock = 1 /* (reg & 0x?? ) */;
74 /*ErrorF("neo_I2CGetBits: %d %d\n", *clock, *data);*/
/xsrc/external/mit/xf86-video-apm/dist/src/
H A Dapm_i2c.c31 ApmI2CPutBits(I2CBusPtr b, int clock, int data) argument
41 if(clock) reg |= 0x08;
49 ApmI2CGetBits(I2CBusPtr b, int *clock, int *data) argument
62 *clock = (reg & STATUS_SCL) != 0;
/xsrc/external/mit/xf86-video-cirrus/dist/src/
H A Dlg_i2c.c25 LgI2CPutBits(I2CBusPtr b, int clock, int data) argument
37 if (clock)
43 ErrorF("LgI2CPutBits: %d %d\n", clock, data);
48 LgI2CGetBits(I2CBusPtr b, int *clock, int *data) argument
60 *clock = (regval & 0x8000) != 0;
63 ErrorF("LgI2CGetBits: %d %d\n", *clock, *data);
H A Dalp_i2c.c52 AlpI2CPutBits(I2CBusPtr b, int clock, int data) argument
61 if (clock) reg |= 1;
64 /* ErrorF("AlpI2CPutBits: %d %d\n", clock, data); */
68 AlpI2CGetBits(I2CBusPtr b, int *clock, int *data) argument
78 *clock = (reg & 0x04) != 0;
80 /* ErrorF("AlpI2CGetBits: %d %d\n", *clock, *data); */
/xsrc/external/mit/xf86-video-nsc/dist/src/gfx/
H A Dgfx_i2c.c175 gfx_i2c_select_gpio(int clock, int data) argument
179 acc_i2c_select_gpio(clock, data);
183 gpio_i2c_select_gpio(clock, data);
/xsrc/external/mit/xf86-video-geode/dist/src/gfx/
H A Dgfx_i2c.c74 gfx_i2c_select_gpio(int clock, int data) argument
78 acc_i2c_select_gpio(clock, data);
82 gpio_i2c_select_gpio(clock, data);
/xsrc/external/mit/xf86-video-mach64/dist/src/
H A Daticlock.c24 * For all supported programmable clock generators, the driver will ignore any
25 * XF86Config clock line and programme, as needed, the clock number reserved by
33 * best approximates the mode's clock frequency, where R is the crystal-
36 * Different clock generators have different restrictions on the value N, M and
39 * then encoded in a generator-specific way and used to programme the clock.
40 * The Mach64's clock divider is not used in this case.
57 * Definitions related to programmable clock generators.
121 * Recognise supported clock generators. This involves telling the
128 "%s programmable clock generato
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/xsrc/external/mit/xf86-video-sunffb/dist/src/
H A Dffb_ddc.c107 FFBI2CGetBits(I2CBusPtr b, int *clock, int *data) argument
131 *clock = (val & FFBDAC_CFG_MPSENSE_SCL) ? 1 : 0;
144 FFBI2CPutBits(I2CBusPtr b, int clock, int data) argument
154 if (clock)
/xsrc/external/mit/xf86-video-intel/dist/src/
H A DMakefile.am74 scripts/clock.5c \
75 scripts/clock-graph.5c \
/xsrc/external/mit/xf86-video-intel-2014/dist/src/
H A DMakefile.am74 scripts/clock.5c \
75 scripts/clock-graph.5c \
/xsrc/external/mit/xf86-video-openchrome/dist/src/
H A Dvia_outputs.c105 * Sets DIP0 (Digital Interface Port 0) clock I/O pad drive strength
211 * Sets DVP0 (Digital Video Port 0) clock I/O pad drive strength.
315 * Sets DVP1 (Digital Video Port 1) clock I/O pad drive strength.
624 * 11: One DVI only (decrease the clock jitter) */
782 ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, int base, int probase) argument
788 "ViaSetDotclock to 0x%06x\n", (unsigned)clock));
791 hwp->writeSeq(hwp, base, clock >> 8);
792 hwp->writeSeq(hwp, base+1, clock & 0xFF);
796 pll.packed = clock;
819 ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) argument
833 ViaSetSecondaryDotclock(ScrnInfoPtr pScrn,CARD32 clock) argument
847 ViaSetECKDotclock(ScrnInfoPtr pScrn,CARD32 clock) argument
854 ViaComputeDotClock(unsigned clock) argument
886 ViaComputeProDotClock(unsigned clock) argument
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/xsrc/external/mit/xf86-video-geode/dist/src/
H A Dlx_panel.c101 " VSA Panel Mode is: %dx%d, pixel clock freq(kHz) is %d\n",
117 int clock; local in function:LXGetManualPanelMode
124 &clock,
142 mode->Clock = clock;

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