| /xsrc/external/mit/oclock/dist/ |
| Clock.c | 28 * Clock.c
30 * a NeWS clone clock
50 #define offset(field) XtOffsetOf(ClockRec, clock.field)
87 static double clock_to_angle ( double clock );
90 # define BORDER_SIZE(w) ((w)->clock.border_size)
95 # define JEWEL_SIZE(w) ((w)->clock.jewel_size)
104 /* class_name */ "Clock",
155 if (w->clock.transparent)
161 myXGCV.foreground = w->clock.minute;
162 w->clock.minuteGC = XtGetGC(gnew, valuemask, &myXGCV)
[all...] |
| /xsrc/external/mit/xclock/dist/ |
| Clock.c | 1 /* $Xorg: Clock.c,v 1.4 2001/02/09 02:05:39 xorgcvs Exp $ */
2 /* $XdotOrg: xc/programs/xclock/Clock.c,v 1.3 2004/10/30 20:33:44 alanc Exp $ */
75 /* $XFree86: xc/programs/xclock/Clock.c,v 3.25 2003/07/04 16:24:30 eich Exp $ */
139 #define offset(field) XtOffsetOf(ClockRec, clock.field)
235 /* class_name */ "Clock",
271 { /* clock fields */
505 if (w->clock.brief) {
506 if (w->clock.twentyfour) {
524 else if (w->clock.utime) {
533 else if (*w->clock.strftime)
[all...] |
| Makefile.am | 30 Clock.c \
31 Clock.h \
48 clock.bit
|
| ClockP.h | 58 #include "Clock.h"
75 /* New fields for the clock widget instance record */
146 #define ClockFgPixel(c) ((c)->clock.fg_color.pixel)
148 #define ClockFgPixel(c) ((c)->clock.fgpixel)
155 ClockPart clock; member in struct:_ClockRec
158 /* New fields for the Clock widget class record */
|
| /xsrc/external/mit/xf86-video-s3virge/dist/src/ |
| s3v_i2c.c | 67 s3v_I2CPutBits(I2CBusPtr b, int clock, int data)
72 if(clock) reg |= 0x1;
76 /*ErrorF("s3v_I2CPutBits: %d %d\n", clock, data); */
80 s3v_I2CGetBits(I2CBusPtr b, int *clock, int *data)
87 *clock = reg & 0x4;
90 /*ErrorF("s3v_I2CGetBits: %d %d\n", *clock, *data);*/
|
| /xsrc/external/mit/xf86-video-trident/dist/src/ |
| trident_i2c.c | 18 TRIDENTI2CPutBits(I2CBusPtr b, int clock, int data) {
28 if(clock) reg |= 2;
33 ErrorF("TRIDENTI2CPutBits: %d %d\n", clock, data);
38 TRIDENTI2CGetBits(I2CBusPtr b, int *clock, int *data) {
50 *clock = (reg & 0x02) != 0;
53 ErrorF("TRIDENTI2CGetBits: %d %d\n", *clock, *data);
|
| trident_pll.c | 59 TGUISetClock(ScrnInfoPtr pScrn, int clock, CARD8 *a, CARD8 *b)
77 if (clock >= 100000) startk = 0; else
78 if (clock >= 50000) startk = 1; else
84 if (clock > 50000) startk = 1; else
88 freq = clock;
120 FatalError("Unable to set programmable clock.\n"
121 "Frequency %d is not a valid clock.\n"
122 "Please modify XF86Config for a new clock.\n",
138 "Found Clock %6.2f n=%i m=%i k=%i\n",
139 clock/1000., p, q, r)
[all...] |
| /xsrc/external/mit/xf86-video-xgi/dist/src/ |
| xgi_dac.h | 31 int compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div,
39 void XGICalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned *vclk);
|
| xgi_vga.c | 70 int clock = mode->Clock; local
149 if (clock < 100000)
151 else if (clock < 200000)
153 else if (clock < 250000)
196 if (compute_vclk(clock, &num, &denum, &div, &sbit, &scale)) {
207 /* if compute_vclk cannot handle the request clock try XGICalcClock! */
208 XGICalcClock(pScrn, clock, 2, vclk);
227 if ( (pXGI->Chipset == PCI_CHIP_XGIXG40) && (clock > 150000) ) { /* enable two-pixel mode */
235 /*pReg->xgiRegs3C2 = inb(0x3CC) | 0x0C;*/ /* Programmable Clock */
[all...] |
| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| i830_display.c | 459 /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
461 static void i8xx_clock(int refclk, intel_clock_t *clock)
463 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
464 clock->p = clock->p1 * clock->p2;
465 clock->vco = refclk * clock->m / (clock->n + 2)
578 intel_clock_t clock; local
636 intel_clock_t clock; local
1519 intel_clock_t clock; local
2202 intel_clock_t clock; local
[all...] |
| /xsrc/external/mit/xf86-video-neomagic/dist/src/ |
| neo_i2c.c | 53 neo_I2CPutBits(I2CBusPtr b, int clock, int data) {
60 if(clock) reg |= 1;
63 /*ErrorF("neo_I2CPutBits: %d %d\n", clock, data); */
67 neo_I2CGetBits(I2CBusPtr b, int *clock, int *data) {
72 *clock = 1 /* (reg & 0x?? ) */;
74 /*ErrorF("neo_I2CGetBits: %d %d\n", *clock, *data);*/
|
| /xsrc/external/mit/xf86-video-savage/dist/src/ |
| savage_i2c.c | 38 SavageI2CPutBits(I2CBusPtr b, int clock, int data)
48 if(clock) reg |= 0x1;
52 /*ErrorF("SavageI2CPutBits: %d %d\n", clock, data); */
56 SavageI2CGetBits(I2CBusPtr b, int *clock, int *data)
68 *clock = reg & 0x4;
71 /*ErrorF("SavageI2CGetBits: %d %d\n", *clock, *data); */
|
| /xsrc/external/mit/xf86-video-siliconmotion/dist/src/ |
| smi_i2c.c | 43 SMI_I2CPutBits(I2CBusPtr b, int clock, int data)
48 if (clock) reg |= 0x01;
55 SMI_I2CGetBits(I2CBusPtr b, int *clock, int *data)
60 *clock = reg & 0x04;
|
| smi_501.c | 104 save->clock.value = READ_SCR(pSmi, save->current_clock);
207 mode->clock.f.m_select = x_select;
208 mode->clock.f.m_divider = x_divider;
209 mode->clock.f.m_shift = x_shift;
217 mode->clock.f.m1_select = x_select;
218 mode->clock.f.m1_divider = x_divider;
219 mode->clock.f.m1_shift = x_shift;
240 MSOCClockRec clock; local
247 clock.value = READ_SCR(pSmi, mode->current_clock);
250 clock.f.m_select = mode->clock.f.m_select
287 MSOCClockRec clock; local
326 MSOCClockRec clock; local
[all...] |
| /xsrc/external/mit/xf86-video-apm/dist/src/ |
| apm_i2c.c | 31 ApmI2CPutBits(I2CBusPtr b, int clock, int data)
41 if(clock) reg |= 0x08;
49 ApmI2CGetBits(I2CBusPtr b, int *clock, int *data)
62 *clock = (reg & STATUS_SCL) != 0;
|
| /xsrc/external/mit/xf86-video-cirrus/dist/src/ |
| lg_i2c.c | 25 LgI2CPutBits(I2CBusPtr b, int clock, int data)
37 if (clock)
43 ErrorF("LgI2CPutBits: %d %d\n", clock, data);
48 LgI2CGetBits(I2CBusPtr b, int *clock, int *data)
60 *clock = (regval & 0x8000) != 0;
63 ErrorF("LgI2CGetBits: %d %d\n", *clock, *data);
|
| alp_i2c.c | 52 AlpI2CPutBits(I2CBusPtr b, int clock, int data)
61 if (clock) reg |= 1;
64 /* ErrorF("AlpI2CPutBits: %d %d\n", clock, data); */
68 AlpI2CGetBits(I2CBusPtr b, int *clock, int *data)
78 *clock = (reg & 0x04) != 0;
80 /* ErrorF("AlpI2CGetBits: %d %d\n", *clock, *data); */
|
| /xsrc/external/mit/xf86-video-geode/dist/src/gfx/ |
| gfx_i2c.c | 74 gfx_i2c_select_gpio(int clock, int data)
78 acc_i2c_select_gpio(clock, data);
82 gpio_i2c_select_gpio(clock, data);
|
| /xsrc/external/mit/xf86-video-nsc/dist/src/gfx/ |
| gfx_i2c.c | 175 gfx_i2c_select_gpio(int clock, int data)
179 acc_i2c_select_gpio(clock, data);
183 gpio_i2c_select_gpio(clock, data);
|
| /xsrc/external/mit/xf86-video-mach64/dist/src/ |
| aticlock.c | 24 * For all supported programmable clock generators, the driver will ignore any
25 * XF86Config clock line and programme, as needed, the clock number reserved by
33 * best approximates the mode's clock frequency, where R is the crystal-
36 * Different clock generators have different restrictions on the value N, M and
39 * then encoded in a generator-specific way and used to programme the clock.
40 * The Mach64's clock divider is not used in this case.
57 * Definitions related to programmable clock generators.
121 * Recognise supported clock generators. This involves telling the
128 "%s programmable clock generator detected.\n"
[all...] |
| /xsrc/external/mit/xf86-video-sunffb/dist/src/ |
| ffb_ddc.c | 107 FFBI2CGetBits(I2CBusPtr b, int *clock, int *data)
131 *clock = (val & FFBDAC_CFG_MPSENSE_SCL) ? 1 : 0;
144 FFBI2CPutBits(I2CBusPtr b, int clock, int data)
154 if (clock)
|
| /xsrc/external/mit/xf86-video-openchrome/dist/src/ |
| via_outputs.c | 105 * Sets DIP0 (Digital Interface Port 0) clock I/O pad drive strength
116 /* 3C5.1E[2] - DIP0 Clock Drive Strength Bit [0] */
119 /* 3C5.2A[4] - DIP0 Clock Drive Strength Bit [1] */
123 "DIP0 Clock I/O Pad Drive Strength: %u\n",
211 * Sets DVP0 (Digital Video Port 0) clock I/O pad drive strength.
221 /* 3C5.1E[2] - DVP0 Clock Drive Strength Bit [0] */
224 /* 3C5.2A[4] - DVP0 Clock Drive Strength Bit [1] */
228 "DVP0 Clock I/O Pad Drive Strength: %u\n",
315 * Sets DVP1 (Digital Video Port 1) clock I/O pad drive strength.
325 /* 3C5.65[3:2] - DVP1 Clock Pads Driving Selec
[all...] |
| /xsrc/external/mit/xf86-video-geode/dist/src/ |
| lx_panel.c | 101 " VSA Panel Mode is: %dx%d, pixel clock freq(kHz) is %d\n",
103 lx_panel_modes[ret].VDisplay, lx_panel_modes[ret].Clock);
117 int clock; local
124 &clock,
142 mode->Clock = clock;
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| tu_perfetto.cc | 70 /* Note: clock_id's below 128 are reserved.. for custom clock sources,
72 * See: https://perfetto.dev/docs/concepts/clock-sync
215 auto clock = event->add_clocks();
217 clock->set_clock_id(perfetto::protos::pbzero::BUILTIN_CLOCK_BOOTTIME);
218 clock->set_timestamp(cpu_ts);
222 auto clock = event->add_clocks();
224 clock->set_clock_id(gpu_clock_id);
225 clock->set_timestamp(gpu_ts);
|
| /xsrc/external/mit/xf86-video-chips/dist/src/ |
| ct_ddc.c | 111 chips_I2CGetBits(I2CBusPtr b, int *clock, int *data)
126 *clock = (val & pI2C_c->i2cClockBit) != 0;
131 chips_I2CPutBits(I2CBusPtr b, int clock, int data)
138 || ((pI2C_c->i2cClockBit & 0x01) && clock))
144 || ((pI2C_c->i2cClockBit & 0x02) && clock))
150 XR62 = (XR62 & ~pI2C_c->i2cClockBit) | (clock ? pI2C_c->i2cClockBit : 0);
155 val = (val & ~pI2C_c->i2cClockBit) | (clock ? pI2C_c->i2cClockBit : 0);
239 * of possible GPIO pins as data/clock lines as the manufacturer might
261 * We haven't found a valid clock/data line combination - that
|
