Searched refs:draw_offset (Results 1 - 23 of 23) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_state_static.c85 uint32_t draw_offset, draw_size; local in function:update_framebuffer
123 draw_offset = x | (y << 16);
126 if (i915->current.draw_offset != draw_offset) {
127 i915->current.draw_offset = draw_offset;
H A Di915_state_emit.c61 * - I915_PIPELINE_FLUSH which is specifically for the draw_offset flush.
412 OUT_BATCH(i915->current.draw_offset);
414 OUT_BATCH(i915->current.draw_offset);
H A Di915_context.h166 uint32_t draw_offset; member in struct:i915_state
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_state_static.c101 uint32_t draw_offset, draw_size; local in function:update_framebuffer
141 draw_offset = x | (y << 16);
144 if (i915->current.draw_offset != draw_offset) {
145 i915->current.draw_offset = draw_offset;
H A Di915_context.h171 uint32_t draw_offset; member in struct:i915_state
H A Di915_state_emit.c63 * - I915_PIPELINE_FLUSH which is specifically for the draw_offset flush.
485 OUT_BATCH(i915->current.draw_offset);
487 OUT_BATCH(i915->current.draw_offset);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_pixel_read.c160 rrb->draw_offset,
H A Dradeon_tex_copy.c84 intptr_t src_offset = rrb->draw_offset;
H A Dradeon_common_context.h95 uint32_t draw_offset; /* FBO */ member in struct:radeon_renderbuffer
114 uint32_t draw_offset; /* offset into color renderbuffer - FBOs */ member in struct:radeon_colorbuffer_state
H A Dradeon_fbo.c278 ok = rmesa->vtbl.blit(ctx, rrb->bo, rrb->draw_offset,
335 map += rrb->draw_offset;
444 rrb->bo, rrb->draw_offset,
814 rrb->draw_offset = imageOffset;
H A Dradeon_common.c233 offset = rrb->draw_offset;
296 radeon->state.color.draw_offset = offset;
H A Dradeon_state_init.c395 OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_pixel_read.c160 rrb->draw_offset,
H A Dradeon_tex_copy.c84 intptr_t src_offset = rrb->draw_offset;
H A Dradeon_common_context.h95 uint32_t draw_offset; /* FBO */ member in struct:radeon_renderbuffer
114 uint32_t draw_offset; /* offset into color renderbuffer - FBOs */ member in struct:radeon_colorbuffer_state
H A Dradeon_fbo.c278 ok = rmesa->vtbl.blit(ctx, rrb->bo, rrb->draw_offset,
335 map += rrb->draw_offset;
444 rrb->bo, rrb->draw_offset,
814 rrb->draw_offset = imageOffset;
H A Dradeon_common.c232 offset = rrb->draw_offset;
295 radeon->state.color.draw_offset = offset;
H A Dradeon_state_init.c394 OUT_BATCH_RELOC(rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_vtbl.c582 uint32_t draw_x, draw_y, draw_offset; local in function:i915_set_draw_region
652 draw_offset = (draw_y << 16) | draw_x;
658 if (draw_offset != i915->last_draw_offset) {
660 i915->last_draw_offset = draw_offset;
666 state->Buffer[I915_DESTREG_DRAWRECT3] = draw_offset;
670 state->Buffer[I915_DESTREG_DRAWRECT5] = draw_offset;
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_vtbl.c581 uint32_t draw_x, draw_y, draw_offset; local in function:i915_set_draw_region
651 draw_offset = (draw_y << 16) | draw_x;
657 if (draw_offset != i915->last_draw_offset) {
659 i915->last_draw_offset = draw_offset;
665 state->Buffer[I915_DESTREG_DRAWRECT3] = draw_offset;
669 state->Buffer[I915_DESTREG_DRAWRECT5] = draw_offset;
/xsrc/external/mit/MesaLib/dist/src/panfrost/lib/
H A Dpan_indirect_draw.c397 unsigned draw_offset = local in function:update_job
434 store_global(b, get_address_imm(b, job_ptr, draw_offset + WORD(4)),
439 load_global(b, get_address_imm(b, job_ptr, draw_offset + WORD(0)), 2, 32);
451 store_global(b, get_address_imm(b, job_ptr, draw_offset + WORD(0)),
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/
H A Dr200_state_init.c514 OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/
H A Dr200_state_init.c514 OUT_BATCH_RELOC(rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);

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