| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_vec4_gs_nir.cpp | 69 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 77 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 83 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD);
|
| H A D | brw_fs_nir.cpp | 361 cond_reg = get_nir_src(cond->src[0].src); 365 cond_reg = get_nir_src(if_stmt->condition); 469 * them in get_nir_src()), rather than for each definition. 512 fs_reg op0 = get_nir_src(src0->src[0].src); 696 op[i] = get_nir_src(instr->src[i].src); 826 op[0] = get_nir_src(fsign_instr->src[0].src); 2060 fs_visitor::get_nir_src(const nir_src &src) function in class:fs_visitor 2094 * Return an IMM for constants; otherwise call get_nir_src() as normal. 2100 * value and treat it the same as the result of get_nir_src(). 2107 fs_reg(brw_imm_d(nir_src_as_int(src))) : get_nir_src(sr [all...] |
| H A D | brw_vec4_nir.cpp | 101 src_reg condition = get_nir_src(if_stmt->condition, BRW_REGISTER_TYPE_D, 1); 184 new(v->mem_ctx) src_reg(v->get_nir_src(*indirect, 220 vec4_visitor::get_nir_src(const nir_src &src, enum brw_reg_type type, function in class:brw::vec4_visitor 242 vec4_visitor::get_nir_src(const nir_src &src, nir_alu_type type, function in class:brw::vec4_visitor 245 return get_nir_src(src, brw_type_for_nir_type(devinfo, type), 250 vec4_visitor::get_nir_src(const nir_src &src, unsigned num_components) function in class:brw::vec4_visitor 253 return get_nir_src(src, nir_type_int32, num_components); 262 get_nir_src(src, 1); 279 return get_nir_src(*offset_src, BRW_REGISTER_TYPE_UD, 1); 390 emit(ADD(dst_reg(surf_index), get_nir_src(inst [all...] |
| H A D | brw_vec4.h | 350 src_reg get_nir_src(const nir_src &src, enum brw_reg_type type, 352 src_reg get_nir_src(const nir_src &src, nir_alu_type type, 354 src_reg get_nir_src(const nir_src &src,
|
| H A D | brw_vec4_tcs.cpp | 292 src_reg value = get_nir_src(instr->src[0]);
|
| H A D | brw_fs.h | 284 fs_reg get_nir_src(const nir_src &src);
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_vec4_gs_nir.cpp | 85 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 93 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 99 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD);
|
| H A D | brw_fs_nir.cpp | 397 cond_reg = get_nir_src(cond->src[0].src); 400 cond_reg = get_nir_src(if_stmt->condition); 495 * them in get_nir_src()), rather than for each definition. 547 fs_reg op0 = get_nir_src(src0->src[0].src); 700 op[i] = get_nir_src(instr->src[i].src); 834 op[0] = get_nir_src(fsign_instr->src[0].src); 1880 fs_visitor::get_nir_src(const nir_src &src) function in class:fs_visitor 1914 * Return an IMM for constants; otherwise call get_nir_src() as normal. 1920 * value and treat it the same as the result of get_nir_src(). 1927 fs_reg(brw_imm_d(nir_src_as_int(src))) : get_nir_src(sr [all...] |
| H A D | brw_vec4_nir.cpp | 100 src_reg condition = get_nir_src(if_stmt->condition, BRW_REGISTER_TYPE_D, 1); 183 new(v->mem_ctx) src_reg(v->get_nir_src(*indirect, 219 vec4_visitor::get_nir_src(const nir_src &src, enum brw_reg_type type, function in class:brw::vec4_visitor 241 vec4_visitor::get_nir_src(const nir_src &src, nir_alu_type type, function in class:brw::vec4_visitor 244 return get_nir_src(src, brw_type_for_nir_type(devinfo, type), 249 vec4_visitor::get_nir_src(const nir_src &src, unsigned num_components) function in class:brw::vec4_visitor 252 return get_nir_src(src, nir_type_int32, num_components); 261 get_nir_src(src, 1); 278 return get_nir_src(*offset_src, BRW_REGISTER_TYPE_UD, 1); 392 emit(ADD(dst_reg(surf_index), get_nir_src(inst [all...] |
| H A D | brw_vec4.h | 352 src_reg get_nir_src(const nir_src &src, enum brw_reg_type type, 354 src_reg get_nir_src(const nir_src &src, nir_alu_type type, 356 src_reg get_nir_src(const nir_src &src,
|
| H A D | brw_vec4_tcs.cpp | 316 src_reg value = get_nir_src(instr->src[0]);
|
| H A D | brw_fs.h | 250 fs_reg get_nir_src(const nir_src &src);
|