Searched refs:hw_reg (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4.cpp2576 * translate the swizzle for and @hw_reg is the hardware register where we
2584 vec4_visitor::apply_logical_swizzle(struct brw_reg *hw_reg, argument
2596 hw_reg->swizzle = reg.swizzle;
2607 hw_reg->width = BRW_WIDTH_2;
2617 hw_reg->swizzle = BRW_SWIZZLE4(swizzle0 * 2, swizzle0 * 2 + 1,
2637 *hw_reg = suboffset(*hw_reg, 2);
2644 hw_reg->vstride = BRW_VERTICAL_STRIDE_0;
2653 if (hw_reg->subnr % REG_SIZE == 16) {
2655 hw_reg
[all...]
H A Dbrw_vec4.h167 void apply_logical_swizzle(struct brw_reg *hw_reg,
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_vec4.cpp2607 * translate the swizzle for and @hw_reg is the hardware register where we
2615 vec4_visitor::apply_logical_swizzle(struct brw_reg *hw_reg, argument
2627 hw_reg->swizzle = reg.swizzle;
2638 hw_reg->width = BRW_WIDTH_2;
2648 hw_reg->swizzle = BRW_SWIZZLE4(swizzle0 * 2, swizzle0 * 2 + 1,
2668 *hw_reg = suboffset(*hw_reg, 2);
2675 hw_reg->vstride = BRW_VERTICAL_STRIDE_0;
2684 if (hw_reg->subnr % REG_SIZE == 16) {
2686 hw_reg
[all...]
H A Dbrw_vec4.h167 void apply_logical_swizzle(struct brw_reg *hw_reg,

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