| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| r600_shader.h | 233 // omod 234 #define OMOD(x) (x) // SQ_ALU_OMOD_* 249 #define R6xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, fm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 251 ((fm) << 5) | ((omod) << 6) | ((alu_inst) << 8) | ((bs) << 18) | ((dst_gpr) << 21) | \ 253 #define R7xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 255 ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \ 259 #define ALU_DWORD1_OP2(chipfamily, s0a, s1a, uem, up, wm, fm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 261 R6xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, fm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) : \ 262 R7xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp))
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| cayman_shader.h | 173 // omod 174 #define OMOD(x) (x) // SQ_ALU_OMOD_* 189 #define ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 191 ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \
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| evergreen_shader.h | 176 // omod 177 #define OMOD(x) (x) // SQ_ALU_OMOD_* 192 #define ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 194 ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \
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| /xsrc/external/mit/xf86-video-ati-kms/dist/src/ |
| r600_shader.h | 233 // omod 234 #define OMOD(x) (x) // SQ_ALU_OMOD_* 249 #define R6xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, fm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 251 ((fm) << 5) | ((omod) << 6) | ((alu_inst) << 8) | ((bs) << 18) | ((dst_gpr) << 21) | \ 253 #define R7xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 255 ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \ 259 #define ALU_DWORD1_OP2(chipfamily, s0a, s1a, uem, up, wm, fm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 261 R6xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, fm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) : \ 262 R7xx_ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp))
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| cayman_shader.h | 173 // omod 174 #define OMOD(x) (x) // SQ_ALU_OMOD_* 189 #define ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 191 ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \
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| evergreen_shader.h | 176 // omod 177 #define OMOD(x) (x) // SQ_ALU_OMOD_* 192 #define ALU_DWORD1_OP2(s0a, s1a, uem, up, wm, omod, alu_inst, bs, dst_gpr, dr, de, clamp) \ 194 ((omod) << 5) | ((alu_inst) << 7) | ((bs) << 18) | ((dst_gpr) << 21) | \
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| r700_asm.c | 71 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) | 120 alu->omod = G_SQ_ALU_WORD1_OP2_OMOD(word1);
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| r600_asm.h | 66 unsigned omod; member in struct:r600_bytecode_alu
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| eg_asm.c | 325 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| r700_asm.c | 71 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) | 120 alu->omod = G_SQ_ALU_WORD1_OP2_OMOD(word1);
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| r600_asm.h | 62 unsigned omod; member in struct:r600_bytecode_alu
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| eg_asm.c | 325 S_SQ_ALU_WORD1_OP2_OMOD(alu->omod) |
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| aco_optimizer.cpp | 66 * (2) The second pass combines instructions like mad, omod, clamp and 1440 case aco_opcode::v_mul_f32: { /* omod */ 1455 if (vop3 && (vop3->abs[!i] || vop3->neg[!i] || vop3->clamp || vop3->omod)) 1502 vop3.omod != 0 || vop3.opsel != 0) 1907 new_vop3->omod = cmp_vop3.omod; 2033 new_vop3->omod = cmp_vop3.omod; 2085 new_vop3->omod = cmp_vop3.omod; 2233 uint8_t opsel = 0, omod = 0; local 2301 uint8_t opsel = 0, omod = 0; local 2326 uint8_t opsel = 0, omod = 0; local 2590 uint8_t opsel = 0, omod = 0; local 3401 unsigned omod = 0; local [all...] |
| aco_opt_value_numbering.cpp | 173 return a3.clamp == b3.clamp && a3.omod == b3.omod && a3.opsel == b3.opsel; 191 aSDWA.omod == bSDWA.omod;
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| aco_ir.cpp | 202 if (vop3.omod && chip < GFX9) 270 sdwa.omod = vop3.omod; 317 if (vop3->clamp || vop3->omod || vop3->opsel)
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sb/ |
| sb_expr.cpp | 337 if (bc.omod) 338 v = v.f * omod_coeff[bc.omod - 1]; 369 if (b0.clamp != b1.clamp || b0.omod != b1.omod) 403 if (!sd->bc.clamp && !sd->bc.omod && !sd->bc.src[0].abs && 413 && n.bc.clamp == 0 && n.bc.omod == 0 494 !n->bc.src[1].abs && !n->bc.src[0].abs && !d0->bc.omod && 495 !d0->bc.clamp && !n->bc.omod && 531 !n->bc.src[0].abs && !n->bc.src[1].abs && !d1->bc.omod && 532 !d1->bc.clamp && !n->bc.omod & [all...] |
| sb_dump.cpp | 418 if (n->bc.omod) { 420 sblog << omod_str[n->bc.omod];
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| sb_bc_builder.cpp | 432 .OMOD(bc.omod) 449 .OMOD(bc.omod) 463 .EXECUTE_MASK_OP(bc.omod) 478 .OMOD(bc.omod)
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| sb_bc.h | 519 unsigned omod:2; member in struct:r600_sb::bc_alu 550 omod = 0;
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| sb_peephole.cpp | 238 if (d->bc.omod)
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/sb/ |
| sb_expr.cpp | 337 if (bc.omod) 338 v = v.f * omod_coeff[bc.omod - 1]; 369 if (b0.clamp != b1.clamp || b0.omod != b1.omod) 403 if (!sd->bc.clamp && !sd->bc.omod && !sd->bc.src[0].abs && 413 && n.bc.clamp == 0 && n.bc.omod == 0 494 !n->bc.src[1].abs && !n->bc.src[0].abs && !d0->bc.omod && 495 !d0->bc.clamp && !n->bc.omod && 531 !n->bc.src[0].abs && !n->bc.src[1].abs && !d1->bc.omod && 532 !d1->bc.clamp && !n->bc.omod & [all...] |
| sb_dump.cpp | 411 if (n->bc.omod) { 413 sblog << omod_str[n->bc.omod];
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| sb_bc_builder.cpp | 432 .OMOD(bc.omod) 449 .OMOD(bc.omod) 463 .EXECUTE_MASK_OP(bc.omod) 478 .OMOD(bc.omod)
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| sb_peephole.cpp | 238 if (d->bc.omod)
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/ |
| test_sdwa.cpp | 116 BEGIN_TEST(validate.sdwa.omod) 123 //~gfx8! SDWA omod only supported on GFX9+: v1: %_ = v_mul_f32 %vgpr0, %vgpr1 *2 dst_sel:dword src0_sel:dword src1_sel:dword 126 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]).instr->sdwa().omod = 1; 400 mul->omod = 2;
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