| /xsrc/external/mit/MesaLib/dist/src/gallium/winsys/svga/drm/ |
| vmw_surface.h | 102 unsigned surf_size, SVGA3dSurfaceAllFlags flags);
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| vmw_surface.c | 40 unsigned surf_size, SVGA3dSurfaceAllFlags flags)
87 memset(data, 0, surf_size + sizeof(SVGA3dDXSOState));
90 memset(data, 0, surf_size);
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/svga/ |
| svga_screen_cache.c | 128 unsigned surf_size; local
145 surf_size = surface_size(&entry->key);
146 assert(surf_size <= cache->total_size);
147 if (surf_size > cache->total_size)
150 cache->total_size -= surf_size;
221 unsigned surf_size; local
228 surf_size = surface_size(key);
233 if (surf_size >= SVGA_HOST_SURFACE_CACHE_BYTES) {
240 if (cache->total_size + surf_size > SVGA_HOST_SURFACE_CACHE_BYTES) {
245 unsigned target_size = SVGA_HOST_SURFACE_CACHE_BYTES - surf_size;
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/svga/ |
| svga_screen_cache.c | 128 unsigned surf_size; local
145 surf_size = svga_surface_size(&entry->key);
146 assert(surf_size <= cache->total_size);
147 if (surf_size > cache->total_size)
150 cache->total_size -= surf_size;
221 unsigned surf_size; local
228 surf_size = svga_surface_size(key);
233 if (surf_size >= SVGA_HOST_SURFACE_CACHE_BYTES) {
240 if (cache->total_size + surf_size > SVGA_HOST_SURFACE_CACHE_BYTES) {
245 unsigned target_size = SVGA_HOST_SURFACE_CACHE_BYTES - surf_size;
[all...] |
| svga_winsys.h | 611 unsigned surf_size, SVGA3dSurfaceAllFlags flags);
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| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| ac_surface_modifier_test.c | 88 din.dataSurfaceSize = surf->surf_size;
261 uint64_t surf_size; local
264 surf_size = block_count(dims[i][0], dims[i][1],
270 surf_size = align(dims[i][0] * util_format_get_blocksize(format), 256) * dims[i][1];
276 assert(surf.surf_size == surf_size);
277 uint64_t expected_offset = surf_size;
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| ac_surface.c | 635 surf_level->offset_256B = align64(surf->surf_size, AddrSurfInfoOut->baseAlign) / 256;
673 surf->surf_size = (uint64_t)surf_level->offset_256B * 256 + AddrSurfInfoOut->surfSize;
1163 surf->surf_size = 0;
1314 surf->meta_size = align64(surf->surf_size >> 8, (1 << surf->meta_alignment_log2) * 4);
1323 const unsigned total_pixels = surf->surf_size / surf->bpe;
1667 surf->u.gfx9.zs.stencil_offset = align(surf->surf_size, out.baseAlign);
1668 surf->surf_size = surf->u.gfx9.zs.stencil_offset + out.surfSize;
1686 surf->surf_size = out.surfSize;
1697 * Adjust surf_slice_size and surf_size to reflect the change
1703 surf->surf_size = surf->u.gfx9.surf_slice_size * in->numSlices
[all...] |
| ac_surface.h | 363 uint64_t surf_size; member in struct:radeon_surf
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/radeon/drm/ |
| radeon_drm_surface.c | 148 surf_drm->bo_size = surf_ws->surf_size;
190 surf_ws->surf_size = surf_drm->bo_size;
340 surf_ws->fmask_size = fmask.surf_size;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/winsys/radeon/drm/ |
| radeon_drm_surface.c | 148 surf_drm->bo_size = surf_ws->surf_size;
190 surf_ws->surf_size = surf_drm->bo_size;
406 surf_ws->fmask_size = fmask.surf_size;
439 surf_ws->total_size = surf_ws->surf_size;
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/common/ |
| ac_surface.h | 139 struct gfx9_surf_flags fmask; /* not added to surf_size */
140 struct gfx9_surf_flags stencil; /* added to surf_size, use stencil_offset */
210 uint64_t surf_size; member in struct:radeon_surf
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| ac_surface.c | 347 surf_level->offset = align64(surf->surf_size, AddrSurfInfoOut->baseAlign);
371 surf->surf_size = surf_level->offset + AddrSurfInfoOut->surfSize;
832 surf->surf_size = 0;
1000 surf->dcc_size = align64(surf->surf_size >> 8,
1010 const unsigned total_pixels = surf->surf_size / surf->bpe;
1103 surf->u.gfx9.stencil_offset = align(surf->surf_size, out.baseAlign);
1104 surf->surf_size = surf->u.gfx9.stencil_offset + out.surfSize;
1121 surf->surf_size = out.surfSize;
1598 surf->surf_size = 0;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| radeon_video.c | 185 off += surfaces[i]->surf_size;
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| r600_test_dma.c | 294 rctx->clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true);
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| r600_texture.c | 654 out->size = fmask.surf_size;
840 rtex->surface.surf_size, 1 << rtex->surface.surf_alignment_log2, rtex->surface.u.legacy.bankw,
923 rtex->size = rtex->surface.surf_size;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| radeon_video.c | 185 off += surfaces[i]->surf_size;
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| r600_test_dma.c | 295 rctx->clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true);
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| r600_texture.c | 659 out->size = fmask.surf_size;
845 rtex->surface.surf_size, rtex->surface.surf_alignment, rtex->surface.u.legacy.bankw,
930 rtex->size = rtex->surface.surf_size;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeon/ |
| radeon_video.c | 181 off += surfaces[i]->surf_size;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| si_test_blit.c | 296 si_clear_buffer(sctx, dst, 0, sdst->surface.surf_size, &zero, 4, SI_OP_SYNC_BEFORE_AFTER,
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| si_sdma_copy_image.c | 375 if (start_linear_address < 0 || end_linear_address > linear->surface.surf_size)
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| si_test_dma.c | 311 si_clear_buffer(sctx, dst, 0, sdst->surface.surf_size, &zero, 4,
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| cik_sdma.c | 335 end_linear_address > linear->surface.surf_size)
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| si_texture.c | 1067 tex->surface.surf_size,
1124 tex->surface.surf_size, tex->surface.surf_alignment, tex->surface.u.legacy.bankw,
1224 tex->size = tex->surface.surf_size;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/ |
| iris_state.c | 2261 const unsigned surf_size = 4 * GENX(RENDER_SURFACE_STATE_length); local
2264 STATIC_ASSERT(surf_size == SURFACE_STATE_ALIGNMENT);
2272 surf_state->cpu = calloc(surf_state->num_states, surf_size);
2286 const unsigned surf_size = 4 * GENX(RENDER_SURFACE_STATE_length); local
2287 const unsigned bytes = surf_state->num_states * surf_size;
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