| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| H A D | nir_lower_wrmasks.c | 31 * intrinsic store_ssbo (ssa_76, ssa_105, ssa_106) (2, 0, 4, 0) // wrmask=y 39 * intrinsic store_ssbo (ssa_109, ssa_105, ssa_108) (1, 0, 4, 0) // wrmask=x 44 * intrinsic store_ssbo (ssa_76, ssa_105, ssa_106) (15, 0, 4, 0) // wrmask=xzw 53 * intrinsic store_ssbo (ssa_109, ssa_105, ssa_108) (1, 0, 4, 0) // wrmask=x 58 * intrinsic store_ssbo (ssa_112, ssa_105, ssa_111) (3, 0, 4, 0) // wrmask=xy 108 unsigned wrmask = nir_intrinsic_write_mask(intr); local in function:split_wrmask 109 while (wrmask) { 110 unsigned first_component = ffs(wrmask) - 1; 111 unsigned length = ffs(~(wrmask >> first_component)) - 1; 175 wrmask [all...] |
| H A D | nir_lower_clip_disable.c | 82 int wrmask = nir_intrinsic_write_mask(instr); local in function:lower_clip_plane_store 88 if (wrmask & (1 << i)) { 96 nir_store_deref(b, deref, nir_vec(b, components, instr->num_components), wrmask);
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| H A D | nir_lower_vars_to_ssa.c | 637 unsigned wrmask = nir_intrinsic_write_mask(intrin); local in function:rename_variables 638 if (wrmask == (1 << intrin->num_components) - 1) { 658 if (wrmask & (1 << i)) {
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| H A D | ir3_dce.c | 81 if (src && is_tex_or_prefetch(src) && (src->dsts[0]->wrmask > 1)) { 82 src->dsts[0]->wrmask &= ~(1 << instr->split.off); 145 /* fixup wrmask of split instructions to account for adjusted tex 146 * wrmask's: 157 instr->srcs[0]->wrmask = src->dsts[0]->wrmask;
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| H A D | ir3_lower_spill.c | 51 spill->srcs[1]->wrmask = MASK(orig_components); 63 clone->srcs[1]->wrmask = MASK(components); 86 reload->dsts[0]->wrmask = MASK(orig_components); 98 clone->dsts[0]->wrmask = MASK(components);
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| H A D | ir3_a6xx.c | 52 ldib->dsts[0]->wrmask = MASK(intr->num_components); 70 unsigned wrmask = nir_intrinsic_write_mask(intr); local in function:emit_intrinsic_store_ssbo 71 unsigned ncomp = ffs(~wrmask) - 1; 73 assert(wrmask == BITFIELD_MASK(intr->num_components)); 192 atomic->dsts[0]->wrmask = src1->dsts[0]->wrmask; 211 ldib->dsts[0]->wrmask = MASK(intr->num_components); 340 atomic->dsts[0]->wrmask = src1->dsts[0]->wrmask; 360 resinfo->dsts[0]->wrmask [all...] |
| H A D | ir3_lower_subgroups.c | 65 mov_dst->wrmask = dst->wrmask; 71 mov->repeat = util_last_bit(mov_dst->wrmask) - 1; 205 unsigned comp_count = util_last_bit(instr->dsts[0]->wrmask);
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| H A D | ir3_a4xx.c | 55 ldgb->dsts[0]->wrmask = MASK(intr->num_components); 71 unsigned wrmask = nir_intrinsic_write_mask(intr); local in function:emit_intrinsic_store_ssbo 72 unsigned ncomp = ffs(~wrmask) - 1; 74 assert(wrmask == BITFIELD_MASK(intr->num_components)); 246 ldib->dsts[0]->wrmask = MASK(intr->num_components);
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| H A D | ir3_validate.c | 84 validate_assert(ctx, src->wrmask == reg->wrmask); 136 validate_assert(ctx, reg->tied->wrmask == reg->wrmask); 229 ctx, util_is_power_of_two_or_zero(instr->dsts[0]->wrmask + 1));
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| H A D | ir3_print.c | 292 if (reg->wrmask > 0x1) 293 mesa_log_stream_printf(stream, " (wrmask=0x%x)", reg->wrmask); 313 if (instr->dsts[0]->wrmask & (1 << i)) 327 if (reg->wrmask == 0)
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| H A D | ir3_postsched.c | 463 assert(reg->wrmask >= 1); 464 u_foreach_bit (b, reg->wrmask) { 474 if (reg->wrmask == 0) 482 assert(reg->wrmask >= 1); 483 u_foreach_bit (b, reg->wrmask) {
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| H A D | ir3.h | 157 * wrmask may be a bad name since it is used to represent both 160 unsigned wrmask : 16; /* up to vec16 */ member in struct:ir3_register 1063 return util_last_bit(reg->wrmask); 1085 return util_last_bit(instr->dsts[0]->wrmask); 1092 if (dst->wrmask == 0) 1711 reg->wrmask = src->dsts[0]->wrmask; 1826 dst->wrmask = (1 << components) - 1; 1840 dst->wrmask = (1 << components) - 1; 2112 ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask, [all...] |
| H A D | ir3_compiler_nir.c | 70 __ssa_dst(in)->wrmask = compmask; 94 instr->srcs[1]->wrmask = 0x3; 295 unsigned dst_sz, wrmask; local in function:emit_alu 301 wrmask = (1 << dst_sz) - 1; 304 wrmask = alu->dest.write_mask; 340 if (wrmask & (1 << i)) { 761 ldc->dsts[0]->wrmask = MASK(ncomp); 866 resinfo->dsts[0]->wrmask = MASK(3); 896 ldl->dsts[0]->wrmask = MASK(intr->num_components); 911 unsigned base, wrmask, ncom local in function:emit_intrinsic_store_shared 1096 unsigned wrmask, ncomp; local in function:emit_intrinsic_store_scratch 1188 emit_sam(struct ir3_context * ctx,opc_t opc,struct tex_src_info info,type_t type,unsigned wrmask,struct ir3_instruction * src0,struct ir3_instruction * src1) argument [all...] |
| H A D | ir3_parser.y | 83 unsigned wrmask; 163 reg->wrmask = MAX2(1, rflags.wrmask); 164 rflags.flags = rflags.wrmask = 0; 175 reg->wrmask = MAX2(1, rflags.wrmask); 176 rflags.flags = rflags.wrmask = 0; 735 T_IDENTIFIER '=' integer ',' /* wrmask */ 820 instr->dsts[0]->wrmask = (1 << $3) - 1; 1178 | T_WRMASK { rflags.wrmask [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/ir3/ |
| H A D | ir3_depth.c | 185 (src->regs[0]->wrmask > 1)) { 186 src->regs[0]->wrmask &= ~(1 << instr->fo.off);
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| H A D | ir3.h | 132 * wrmask may be a bad name since it is used to represent both 135 unsigned wrmask; member in union:ir3_register::__anond9a07c73040a 754 return util_last_bit(instr->regs[0]->wrmask); 1099 reg->wrmask = src->regs[0]->wrmask; 1320 unsigned wrmask, unsigned flags, struct ir3_instruction *samp_tex, 1328 ir3_reg_create(sam, 0, 0)->wrmask = wrmask; 1332 reg->wrmask = (1 << (src0->regs_count - 1)) - 1; 1338 reg->wrmask [all...] |
| H A D | ir3_a4xx.c | 60 ldgb->regs[0]->wrmask = MASK(intr->num_components); 76 /* TODO handle wrmask properly, see _store_shared().. but I think 80 unsigned wrmask = intr->const_index[0]; local in function:emit_intrinsic_store_ssbo 81 unsigned ncomp = ffs(~wrmask) - 1;
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| H A D | ir3_a6xx.c | 56 ldib->regs[0]->wrmask = MASK(intr->num_components); 72 /* TODO handle wrmask properly, see _store_shared().. but I think 76 unsigned wrmask = intr->const_index[0]; local in function:emit_intrinsic_store_ssbo 77 unsigned ncomp = ffs(~wrmask) - 1;
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| H A D | ir3_context.c | 348 collect->regs[0]->wrmask = MASK(arrsz); 362 if ((n == 1) && (src->regs[0]->wrmask == 0x1)) { 383 if (src->regs[0]->wrmask & (1 << (i + base)))
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/tests/ |
| H A D | delay.c | 117 * ir3_delay_calc_* relies on the src/dst wrmask being correct even for ALU 130 instr->dsts[0]->wrmask = MASK(instr->repeat + 1); 136 reg->wrmask = MASK(instr->repeat + 1); 138 reg->wrmask = 1;
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_shader_info.c | 116 widen_writemask(uint32_t wrmask) argument 120 new_wrmask |= (wrmask & (1 << i) ? 0x3 : 0x0) << (i * 2); 145 uint32_t wrmask = nir_intrinsic_write_mask(instr); local in function:set_output_usage_mask 147 wrmask = widen_writemask(wrmask); 151 ((wrmask >> (i * 4)) & 0xf) << comp;
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/valhall/ |
| H A D | asm.py | 157 wrmask = 0x3 164 wrmask = 1 << WMASKS.index(mask) 166 return parse_int(reg[1:], 0, 63) | (wrmask << 6)
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| /xsrc/external/mit/xf86-video-newport/dist/src/ |
| H A D | newport_regs.c | 160 pNewport->txt_wrmask = pNewportRegs->set.wrmask; 176 pNewportRegs->set.wrmask = pNewport->txt_wrmask;
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| H A D | nir_lower_vars_to_ssa.c | 581 unsigned wrmask = nir_intrinsic_write_mask(intrin); local in function:rename_variables 582 if (wrmask == (1 << intrin->num_components) - 1) { 602 if (wrmask & (1 << i)) {
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| /xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/ |
| H A D | st_atifs_to_nir.c | 410 nir_const_value wrmask[4] = { 0 }; local in function:compile_instruction 413 wrmask[i].b = 1; 417 nir_build_imm(t->b, 4, 1, wrmask),
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