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  /src/lib/libc/quad/
floatunditf_ieee754.c 74 unsigned int bit = 0; local in function:__floatunditf
87 bit += width;
91 x <<= (bit + 1);
93 extu.extu_exp = EXT_EXP_BIAS + (64 - (bit + 1));
  /src/sys/external/bsd/gnu-efi/dist/lib/ia32/
math.c 45 // Left shift 64bit by 32bit and get a 64bit result
80 // Right shift 64bit by 32bit and get a 64bit result
116 // Multiple 64bit by 32bit and get a 64bit result
142 // divide 64bit by 32bit and get a 64bit resul
151 UINT32 bit; local in function:DivU64x32
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  /src/games/bcd/
bcd.c 57 * the patterns were that the old bcd was using for each possible 8-bit
59 * holes. (A 1 bit is a hole.) These may be wrong, but they match the old
123 * i'th bit of w.
125 #define bit(w,i) ((w)&(1<<(i))) macro
196 * like a hole, if the appropriate bit is set in the holes[] table.
203 if (bit(holes[(unsigned char)*p], 11 - row))
  /src/sys/arch/m68k/fpsp/
fpsp.h 148 * fsave offsets and bit definitions
186 guard_bit equ 1 ;guard bit is bit number 1
187 round_bit equ 0 ;round bit is bit number 0
189 denorm_bit equ 7 ;bit determins if denorm or unnorm
190 etemp15_bit equ 4 ;etemp exponent bit #15
191 wbtemp66_bit equ 2 ;wbtemp mantissa bit #66
192 wbtemp1_bit equ 1 ;wbtemp mantissa bit #1
193 wbtemp0_bit equ 0 ;wbtemp mantissa bit #
212 WB_BYTE equ LV-31 ;holds WBTE15 bit (1 byte) variable in typeref:typename:holds WBTE15
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  /src/sys/dev/wscons/
wscons_rinit.c 72 int ch, i, n, bit; local in function:rcons_initfont
85 for (bit = 0; bit < 32; bit++)
86 if (pix[i] & (1 << bit))
87 npix |= (1 << (31 - bit));
  /src/sys/arch/mips/rmi/
rmixl_mainbus.c 112 uint64_t bit; local in function:mainbus_node_alloc
116 bit = 1 << node;
117 if ((sc->sc_node_mask & bit) == 0) {
118 sc->sc_node_mask |= bit;
129 bit = 1 << node;
130 if ((sc->sc_node_mask & bit) == 0) {
131 sc->sc_node_mask |= bit;
rmixl_cpucore.c 161 const u_int bit = 1 << t; local in function:cpucore_rmixl_attach
162 threads_try_attach ^= bit;
172 threads_enb ^= bit;
173 threads_dis |= bit;
  /src/sys/arch/mips/mips/
mips_fputrap.c 84 unsigned int bit; member in struct:__anon54097fc30108
99 if (fpustat & fpecodes[i].bit)
  /src/sys/arch/evbsh3/ap_ms104_sh4/
rs5c316_mainbus.c 159 int bit; local in function:rtc_read
163 bit = (_reg_read_2(SH4_PDTRA) & (1 << GPIO_PIN_RTC_SIO)) ? 1 : 0;
169 return bit;
173 rtc_write(struct rs5c313_softc *sc, int bit)
178 if (bit)
  /src/sys/arch/m68k/fpe/
fpu_mul.c 61 * Each step consists of shifting the accumulator right one bit
62 * (maintaining any guard bits) and, if the next bit in y is set,
64 * we advance one bit leftward in y. Algorithmically:
67 * for (bit = 0; bit < FP_NMANT; bit++) {
69 * if (Y & (1 << bit))
76 * shifted right, but at most one bit.
90 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word.
94 * run 32 times without adding X to A. We can do a 32-bit shift faste
103 uint32_t a2, a1, a0, x2, x1, x0, bit, m; local in function:fpu_mul
    [all...]
fpu_div.c 67 * if X < Y. In that case, it will have to be shifted left one bit to
74 * The quotient mantissa X/Y can then be computed one bit at a time
81 * for (bit = FP_NMANT; --bit >= 0; R *= 2) {
83 * Q |= 1 << bit;
88 * The subtraction R -= Y always removes the uppermost bit from R (and
93 * included in the expanded internal representation. The sticky bit
99 * one bit at a time ``from the top down''. This means that we can
105 * is therefore at in [2.0,4.0).) Thus Q is sure to have bit FP_NMANT-1
112 * bit = FP_1
156 uint32_t q, bit; local in function:fpu_div
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  /src/sys/arch/playstation2/playstation2/
interrupt.h 41 int bit; member in struct:_ipl_dispatcher
  /src/sys/arch/powerpc/pic/
pic_prepivr.c 106 int icu, bit; local in function:prepivr_establish_irq
109 bit = irq % 8;
114 elcr[icu] |= 1 << bit;
116 elcr[icu] &= ~(1 << bit);
  /src/sys/dev/nand/
hamming.c 37 * Calculates the 22-bit hamming code for a 256-bytes block of data.
65 * index bit to 0 (even) or 1 (odd).
77 * - P4 -> bit 2 of index is 0 --------------------'
78 * - P4' -> bit 2 of index is 1.
79 * - P2 -> bit 1 of index if 0.
81 * We deduce that a bit position has an impact on all
82 * even Px if the log2(x)nth bit of its index is 0
85 * and on all odd Px' if the log2(x)nth bit
202 /* If there is a single bit error, there are 11 bits set to 1 */
204 /* Get byte and bit indexes *
215 uint8_t bit = (correction_code[2] >> 5) & 0x04; local in function:hamming_correct_256
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  /src/sys/arch/landisk/dev/
rs5c313_landisk.c 160 * Read bit from SPB1DT pin.
165 int bit; local in function:rtc_read
169 bit = (SHREG_SCSPTR & SCSPTR_SPB1DT) ? 1 : 0;
175 return bit;
180 * Write bit via SPB1DT pin.
183 rtc_write(struct rs5c313_softc *sc, int bit)
187 if (bit)
  /src/sys/arch/hppa/hppa/
ipifuncs.c 82 int bit = 0; local in function:hppa_ipi_intr
93 if (ipi_pending & (1L << bit)) {
94 sc->sc_evcnt_which_ipi[bit].ev_count++;
95 (*ipifunc[bit])();
97 ipi_pending &= ~(1L << bit);
98 bit++;
  /src/sys/arch/powerpc/fpu/
fpu_mul.c 65 * Each step consists of shifting the accumulator right one bit
66 * (maintaining any guard bits) and, if the next bit in y is set,
68 * we advance one bit leftward in y. Algorithmically:
71 * for (bit = 0; bit < FP_NMANT; bit++) {
73 * if (Y & (1 << bit))
80 * shifted right, but at most one bit.
96 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word.
100 * run 32 times without adding X to A. We can do a 32-bit shift faste
109 u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; local in function:fpu_mul
    [all...]
  /src/sys/arch/sparc/fpu/
fpu_mul.c 61 * Each step consists of shifting the accumulator right one bit
62 * (maintaining any guard bits) and, if the next bit in y is set,
64 * we advance one bit leftward in y. Algorithmically:
67 * for (bit = 0; bit < FP_NMANT; bit++) {
69 * if (Y & (1 << bit))
76 * shifted right, but at most one bit.
92 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word.
96 * run 32 times without adding X to A. We can do a 32-bit shift faste
105 u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; local in function:fpu_mul
    [all...]
  /src/sys/dev/ppbus/
ppbus_gpio.c 55 u_char bit; member in struct:__anon3407ec8b0108
138 return ((port >> ppbus_port[pin].bit) & 1) ^ ppbus_port[pin].inv;
148 value <<= ppbus_port[pin].bit;
149 port &= ~(1 << ppbus_port[pin].bit);
  /src/sys/dev/raidframe/
rf_geniq.c 41 five bit lfsr
52 unsigned bit; local in function:lsfr_shift
57 bit = (val >> (i - 1)) & 1;
59 new = new | ((bit ^ high) << i);
61 new = new | (bit << i);
  /src/sys/arch/arm/sa11x0/
sa11x1_pcic.c 125 int cr, bit; local in function:sacpcic_read
132 bit = (so->socket ? SR_S1_CARDDETECT : SR_S0_CARDDETECT) & cr;
133 if (bit)
139 bit = (so->socket ? SR_S1_VS1 : SR_S0_VS1);
140 return (bit & cr);
143 bit = (so->socket ? SR_S1_VS2 : SR_S0_VS2);
144 return (bit & cr);
147 bit = (so->socket ? SR_S1_READY : SR_S0_READY);
148 return (bit & cr);
  /src/common/lib/libc/string/
strspn.c 73 /* 64 bit system, use four 64 bits registers for bitmask */
82 unsigned long bit; local in function:strspn_x
86 /* Four 64bit registers have one bit for each character value */
94 bit = 1ul << (ch & 0x3f);
97 m_0 |= bit;
99 m_4 |= bit;
102 m_8 |= bit;
104 m_c |= bit;
  /src/sys/arch/arm/arm/
cpu_subr.c 98 const u_long bit = __BIT(cpuno % CPUINDEX_DIVISOR); local in function:cpu_boot_secondary_processors
101 while (atomic_load_acquire(&arm_cpu_mbox[off]) & bit) {
115 const u_int bit = cpuindex % CPUINDEX_DIVISOR; local in function:cpu_hatched_p
118 return (atomic_load_acquire(&arm_cpu_hatched[off]) & __BIT(bit)) != 0;
126 const u_long bit = __BIT(cpuindex % CPUINDEX_DIVISOR); local in function:cpu_set_hatched
129 atomic_or_ulong(&arm_cpu_hatched[off], bit);
139 const u_long bit = __BIT(cpuindex % CPUINDEX_DIVISOR); local in function:cpu_clr_mbox
143 atomic_and_ulong(&arm_cpu_mbox[off], ~bit);
  /src/sys/arch/alpha/alpha/
ipifuncs.c 118 u_long pending_ipis, bit; local in function:alpha_ipi_process
139 for (bit = 0; bit < ALPHA_NIPIS; bit++) {
140 if (pending_ipis & (1UL << bit)) {
141 sc->sc_evcnt_which_ipi[bit].ev_count++;
142 (*ipifuncs[bit])(ci, framep);
  /src/sys/arch/arm/amlogic/
meson_pinctrl.h 63 u_int bit; member in struct:meson_pinctrl_group
67 /* when (mask != 0), func/mask are used instead of 'u_int bit' */

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