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    Searched defs:pipeline (Results 1 - 25 of 105) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/xen/
xen_drm_front_conn.c 53 struct xen_drm_front_drm_pipeline *pipeline = local
57 pipeline->conn_connected = false;
59 return pipeline->conn_connected ? connector_status_connected :
67 struct xen_drm_front_drm_pipeline *pipeline = local
78 videomode.hactive = pipeline->width;
79 videomode.vactive = pipeline->height;
108 struct xen_drm_front_drm_pipeline *pipeline = local
113 pipeline->conn_connected = true;
xen_drm_front.h 131 struct xen_drm_front_drm_pipeline pipeline[XEN_DRM_FRONT_MAX_CRTCS]; member in struct:xen_drm_front_drm_info
144 int xen_drm_front_mode_set(struct xen_drm_front_drm_pipeline *pipeline,
xen_drm_front_kms.c 96 static void send_pending_event(struct xen_drm_front_drm_pipeline *pipeline)
98 struct drm_crtc *crtc = &pipeline->pipe.crtc;
103 if (pipeline->pending_event)
104 drm_crtc_send_vblank_event(crtc, pipeline->pending_event);
105 pipeline->pending_event = NULL;
113 struct xen_drm_front_drm_pipeline *pipeline = local
122 ret = xen_drm_front_mode_set(pipeline, crtc->x, crtc->y,
129 pipeline->conn_connected = false;
137 struct xen_drm_front_drm_pipeline *pipeline = local
142 ret = xen_drm_front_mode_set(pipeline, 0, 0, 0, 0, 0
172 struct xen_drm_front_drm_pipeline *pipeline = local
197 struct xen_drm_front_drm_pipeline *pipeline = local
231 struct xen_drm_front_drm_pipeline *pipeline = local
274 struct xen_drm_front_drm_pipeline *pipeline = local
339 struct xen_drm_front_drm_pipeline *pipeline = local
359 struct xen_drm_front_drm_pipeline *pipeline = local
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/draw/
draw_pipe_validate.c 43 * pipeline stages, or whether prims/verts can go through untouched.
45 * about the primitive pipeline stages.
67 * and triggering the pipeline, because we have to trigger the
68 * pipeline *anyway* if unfilled mode is active.
72 if (rasterizer->line_stipple_enable && draw->pipeline.line_stipple)
76 if (roundf(rasterizer->line_width) > draw->pipeline.wide_line_threshold)
80 if ((!rasterizer->multisample && rasterizer->line_smooth) && draw->pipeline.aaline)
88 if (rasterizer->point_size > draw->pipeline.wide_point_threshold)
93 && draw->pipeline.wide_point_sprites)
97 if ((!rasterizer->multisample && rasterizer->point_smooth) && draw->pipeline.aapoint
291 struct draw_stage *pipeline = validate_pipeline( stage ); local
298 struct draw_stage *pipeline = validate_pipeline( stage ); local
305 struct draw_stage *pipeline = validate_pipeline( stage ); local
311 struct draw_stage *pipeline = validate_pipeline( stage ); local
    [all...]
draw_pt_fetch_shade_pipeline.c 65 * Prepare/validate middle part of the vertex pipeline.
150 /* No-op since the vertex shader executor and drawing pipeline
175 static void pipeline(struct fetch_pipeline_middle_end *fpme, function
278 * the pipeline verts.
365 /* Do we need to run the pipeline?
368 pipeline( fpme, vert_info, prim_info );
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/draw/
draw_pipe_validate.c 43 * pipeline stages, or whether prims/verts can go through untouched.
45 * about the primitive pipeline stages.
67 * and triggering the pipeline, because we have to trigger the
68 * pipeline *anyway* if unfilled mode is active.
72 if (rasterizer->line_stipple_enable && draw->pipeline.line_stipple)
76 if (roundf(rasterizer->line_width) > draw->pipeline.wide_line_threshold)
80 if (rasterizer->line_smooth && draw->pipeline.aaline)
88 if (rasterizer->point_size > draw->pipeline.wide_point_threshold)
93 && draw->pipeline.wide_point_sprites)
97 if (rasterizer->point_smooth && draw->pipeline.aapoint
284 struct draw_stage *pipeline = validate_pipeline( stage ); local
291 struct draw_stage *pipeline = validate_pipeline( stage ); local
298 struct draw_stage *pipeline = validate_pipeline( stage ); local
304 struct draw_stage *pipeline = validate_pipeline( stage ); local
    [all...]
  /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
gen8_cmd_buffer.c 219 struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline; local
220 if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT))
224 const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
236 if (!pipeline->depth_test_enable)
252 return (pipeline->kill_pixel && (pipeline->writes_depth ||
253 pipeline->writes_stencil)) ||
281 * SW parses the pipeline states to generate the following logical
329 struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline local
384 struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline; local
    [all...]
gen7_cmd_buffer.c 180 struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline; local
198 anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, pipeline->gen7.sf);
237 pipeline->writes_stencil,
243 pipeline->gen7.depth_stencil_state,
260 vf.IndexedDrawCutIndexEnable = pipeline->primitive_restart;
267 ib.CutIndexEnable = pipeline->primitive_restart;
  /src/external/bsd/less/dist/lesstest/
pipeline.c 86 LessPipeline* pipeline = malloc(sizeof(LessPipeline)); local
87 pipeline->less_in_pipe[RD] = pipeline->less_in_pipe[WR] = -1;
88 pipeline->screen_in_pipe[RD] = pipeline->screen_in_pipe[WR] = -1;
89 pipeline->screen_out_pipe[RD] = pipeline->screen_out_pipe[WR] = -1;
90 pipeline->less_in = pipeline->screen_out = -1;
91 pipeline->tempfile = NULL
101 LessPipeline* pipeline = new_pipeline(); local
    [all...]
run.c 45 static void send_char(LessPipeline* pipeline, wchar ch) {
50 write(pipeline->less_in, cbuf, cp-cbuf);
54 static int read_screen(LessPipeline* pipeline, byte* buf, int buflen) {
56 send_char(pipeline, LESS_DUMP_CHAR);
60 if (read(pipeline->screen_out, &ch, 1) != 1)
70 static void read_and_display_screen(LessPipeline* pipeline) {
72 int rn = read_screen(pipeline, rbuf, sizeof(rbuf));
75 display_screen(rbuf, rn, pipeline->screen_width, pipeline->screen_height);
80 static int curr_screen_match(LessPipeline* pipeline, const byte* img, int imglen)
102 LessPipeline* pipeline = create_less_pipeline(argv, argc, envp); local
142 LessPipeline* pipeline = create_less_pipeline(setup->argv, setup->argc, local
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
radv_meta_fmask_expand.c 105 VkPipeline pipeline = device->meta_state.fmask_expand.pipeline[samples_log2]; local
108 pipeline); local
176 radv_DestroyPipeline(radv_device_to_handle(device), state->fmask_expand.pipeline[i],
187 create_fmask_expand_pipeline(struct radv_device *device, int samples, VkPipeline *pipeline)
211 &vk_pipeline_info, NULL, pipeline);
260 result = create_fmask_expand_pipeline(device, samples, &state->fmask_expand.pipeline[i]);
radv_meta_decompress.c 238 VkPipelineLayout layout, enum radv_depth_op op, VkPipeline *pipeline)
244 if (*pipeline) {
358 &extra, &device->meta_state.alloc, pipeline);
443 VkPipeline *pipeline; local
467 pipeline = &state->depth_decomp[samples_log2].decompress_pipeline;
470 pipeline = &state->depth_decomp[samples_log2].resummarize_pipeline;
476 return pipeline;
555 VkPipeline *pipeline; local
561 pipeline = radv_get_depth_pipeline(cmd_buffer, image, subresourceRange, op);
564 *pipeline); local
    [all...]
radv_meta_fast_clear.c 636 VkPipeline *pipeline; local
640 pipeline = &device->meta_state.fast_clear_flush.cmask_eliminate_pipeline;
644 pipeline = &device->meta_state.fast_clear_flush.fmask_decompress_pipeline;
651 pipeline = &device->meta_state.fast_clear_flush.dcc_decompress_pipeline;
671 if (!*pipeline) {
693 *pipeline); local
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/ir/pp/
instr.c 73 int pipeline = pos == PPIR_INSTR_SLOT_ALU_VEC_MUL ? local
83 /* update add node src to use pipeline reg */
88 src->pipeline = pipeline;
93 src->pipeline = pipeline;
99 src->pipeline = pipeline;
102 /* update mul node dest to output to pipeline reg */
104 dest->pipeline = pipeline
    [all...]
node_to_instr.c 41 * If a node has a pipeline dest, schedule it in the same instruction as its
43 * Since it has a pipeline dest, it must have only one successor and since we
45 * Load varyings can't output to a pipeline register but are also potentially
88 * by using pipeline reg ^vmul/^fmul */
133 ppir_pipeline pipeline_reg = dest->pipeline;
155 mov_src->pipeline = dest->pipeline = pipeline_reg;
186 mov_src->pipeline = dest->pipeline = ppir_pipeline_reg_const0;
231 unsigned int pipeline = 0 local
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/zink/
zink_pipeline.c 281 VkPipeline pipeline; local
283 NULL, &pipeline) != VK_SUCCESS) {
288 return pipeline;
322 VkPipeline pipeline; local
324 NULL, &pipeline) != VK_SUCCESS) {
330 return pipeline;
zink_pipeline.h 53 * Members after this point are not included in pipeline state hash key */
85 VkPipeline pipeline; member in struct:zink_gfx_pipeline_state
93 * Members after this point are not included in pipeline state hash key */
99 VkPipeline pipeline; member in struct:zink_compute_pipeline_state
  /xsrc/external/mit/MesaLib/dist/src/virtio/vulkan/
vn_pipeline.c 69 /* pipeline layout commands */
120 /* pipeline cache commands */
242 /* pipeline commands */
312 struct vn_pipeline *pipeline = local
313 vk_zalloc(alloc, sizeof(*pipeline), VN_DEFAULT_ALIGN,
315 if (!pipeline) {
326 vn_object_base_init(&pipeline->base, VK_OBJECT_TYPE_PIPELINE,
329 VkPipeline pipeline_handle = vn_pipeline_to_handle(pipeline);
356 struct vn_pipeline *pipeline = local
357 vk_zalloc(alloc, sizeof(*pipeline), VN_DEFAULT_ALIGN
386 struct vn_pipeline *pipeline = vn_pipeline_from_handle(_pipeline); local
    [all...]
  /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
radv_meta_fmask_expand.c 123 VkPipeline pipeline = device->meta_state.fmask_expand.pipeline[samples_log2]; local
126 VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); local
200 state->fmask_expand.pipeline[i],
215 VkPipeline *pipeline)
241 pipeline);
298 &state->fmask_expand.pipeline[i]);
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/lima/ir/pp/
instr.c 73 int pipeline = pos == PPIR_INSTR_SLOT_ALU_VEC_MUL ? local
83 /* update add node src to use pipeline reg */
88 src->pipeline = pipeline;
93 src->pipeline = pipeline;
99 src->pipeline = pipeline;
102 /* update mul node dest to output to pipeline reg */
104 dest->pipeline = pipeline
    [all...]
  /src/crypto/external/apache2/openssl/dist/test/
sslbuffertest.c 201 int i, pipeline = test > 3; local
204 if (pipeline) {
215 if (pipeline) {
228 * For the non-pipeline case we write one record. For pipelining we write
231 for (i = 0; i <= pipeline; i++) {
245 if (pipeline)
277 if (pipeline) {
299 if (pipeline) {
  /src/crypto/external/bsd/openssl/dist/test/
sslbuffertest.c 182 int i, pipeline = test > 3; local
185 if (pipeline) {
196 if (pipeline) {
209 * For the non-pipeline case we write one record. For pipelining we write
212 for (i = 0; i <= pipeline; i++) {
226 if (pipeline)
258 if (pipeline) {
280 if (pipeline) {
  /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/
helpers.h 101 void print_pipeline_ir(VkDevice device, VkPipeline pipeline, VkShaderStageFlagBits stages,
133 VkPipeline pipeline; member in class:PipelineBuilder
  /xsrc/external/mit/MesaLib/dist/src/gallium/frontends/xvmc/tests/
xvmc_bench.c 59 unsigned int pipeline; member in struct:Config
75 config->pipeline = 0;
108 config->pipeline |= PIPELINE_STEP_MC;
110 config->pipeline |= PIPELINE_STEP_CSC;
112 config->pipeline |= PIPELINE_STEP_SWAP;
159 "\t-p <pipeline>\tPipeline to test\n"
173 if (!config->pipeline)
174 config->pipeline = PIPELINE_STEP_MC | PIPELINE_STEP_CSC | PIPELINE_STEP_SWAP;
272 if (config.pipeline & PIPELINE_STEP_MC)
277 if (config.pipeline & PIPELINE_STEP_CSC
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
anv_measure.c 174 if (type == INTEL_SNAPSHOT_COMPUTE && cmd_buffer->state.compute.pipeline) {
175 snapshot->cs = (uintptr_t) cmd_buffer->state.compute.pipeline->cs;
176 } else if (cmd_buffer->state.gfx.pipeline) {
177 const struct anv_graphics_pipeline *pipeline = local
178 cmd_buffer->state.gfx.pipeline;
179 snapshot->vs = (uintptr_t) pipeline->shaders[MESA_SHADER_VERTEX];
180 snapshot->tcs = (uintptr_t) pipeline->shaders[MESA_SHADER_TESS_CTRL];
181 snapshot->tes = (uintptr_t) pipeline->shaders[MESA_SHADER_TESS_EVAL];
182 snapshot->gs = (uintptr_t) pipeline->shaders[MESA_SHADER_GEOMETRY];
183 snapshot->fs = (uintptr_t) pipeline->shaders[MESA_SHADER_FRAGMENT]
    [all...]

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