Searched refs:CLK_TOP_MSDCPLL (Results 1 - 8 of 8) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt6765-clk.h76 #define CLK_TOP_MSDCPLL 39 macro
H A Dmt8173-clk.h49 #define CLK_TOP_MSDCPLL 37 macro
H A Dmediatek,mt6795-clk.h47 #define CLK_TOP_MSDCPLL 34 macro
H A Dmt2701-clk.h49 #define CLK_TOP_MSDCPLL 37 macro
H A Dmt2712-clk.h112 #define CLK_TOP_MSDCPLL 79 macro
H A Dmt8192-clk.h138 #define CLK_TOP_MSDCPLL 124 macro
H A Dmediatek,mt8365-clk.h65 #define CLK_TOP_MSDCPLL 53 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8365-evk.dts165 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>;

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