Searched refs:CLK_TOP_UNIVPLL_D4 (Results 1 - 6 of 6) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8516-clk.h54 #define CLK_TOP_UNIVPLL_D4 20 macro
H A Dmt8192-clk.h101 #define CLK_TOP_UNIVPLL_D4 87 macro
H A Dmediatek,mt8188-clk.h125 #define CLK_TOP_UNIVPLL_D4 112 macro
H A Dmt8195-clk.h158 #define CLK_TOP_UNIVPLL_D4 144 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi2854 <&topckgen CLK_TOP_UNIVPLL_D4>;
2857 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
2874 <&topckgen CLK_TOP_UNIVPLL_D4>;
2877 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
2898 <&topckgen CLK_TOP_UNIVPLL_D4>;
2901 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
3008 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
H A Dmt8192.dtsi1828 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;

Completed in 15 milliseconds