Searched refs:CLK_TOP_UNIVPLL_D6 (Results 1 - 5 of 5) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8516-clk.h58 #define CLK_TOP_UNIVPLL_D6 24 macro
H A Dmt8192-clk.h109 #define CLK_TOP_UNIVPLL_D6 95 macro
H A Dmediatek,mt8188-clk.h133 #define CLK_TOP_UNIVPLL_D6 120 macro
H A Dmt8195-clk.h166 #define CLK_TOP_UNIVPLL_D6 152 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi1247 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6>;
1258 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6>;

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