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cpu.h revision 1.94
      1  1.94      matt /*	$NetBSD: cpu.h,v 1.94 2009/12/14 00:46:04 matt Exp $	*/
      2   1.8       cgd 
      3   1.1   deraadt /*-
      4   1.5     glass  * Copyright (c) 1992, 1993
      5   1.5     glass  *	The Regents of the University of California.  All rights reserved.
      6   1.1   deraadt  *
      7   1.1   deraadt  * This code is derived from software contributed to Berkeley by
      8   1.1   deraadt  * Ralph Campbell and Rick Macklem.
      9   1.1   deraadt  *
     10   1.1   deraadt  * Redistribution and use in source and binary forms, with or without
     11   1.1   deraadt  * modification, are permitted provided that the following conditions
     12   1.1   deraadt  * are met:
     13   1.1   deraadt  * 1. Redistributions of source code must retain the above copyright
     14   1.1   deraadt  *    notice, this list of conditions and the following disclaimer.
     15   1.1   deraadt  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1   deraadt  *    notice, this list of conditions and the following disclaimer in the
     17   1.1   deraadt  *    documentation and/or other materials provided with the distribution.
     18  1.71       agc  * 3. Neither the name of the University nor the names of its contributors
     19   1.1   deraadt  *    may be used to endorse or promote products derived from this software
     20   1.1   deraadt  *    without specific prior written permission.
     21   1.1   deraadt  *
     22   1.1   deraadt  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23   1.1   deraadt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24   1.1   deraadt  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25   1.1   deraadt  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26   1.1   deraadt  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27   1.1   deraadt  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28   1.1   deraadt  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29   1.1   deraadt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30   1.1   deraadt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31   1.1   deraadt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32   1.1   deraadt  * SUCH DAMAGE.
     33   1.1   deraadt  *
     34   1.8       cgd  *	@(#)cpu.h	8.4 (Berkeley) 1/4/94
     35   1.1   deraadt  */
     36   1.1   deraadt 
     37   1.1   deraadt #ifndef _CPU_H_
     38   1.1   deraadt #define _CPU_H_
     39   1.1   deraadt 
     40  1.54    simonb #include <mips/cpuregs.h>
     41  1.53    simonb 
     42   1.1   deraadt /*
     43  1.13  jonathan  * Exported definitions unique to NetBSD/mips cpu support.
     44   1.1   deraadt  */
     45  1.36     soren 
     46  1.68    simonb #ifdef _KERNEL
     47  1.53    simonb #ifndef _LOCORE
     48  1.73      yamt #include <sys/cpu_data.h>
     49  1.55    simonb 
     50  1.53    simonb #if defined(_KERNEL_OPT)
     51  1.53    simonb #include "opt_lockdebug.h"
     52  1.53    simonb #endif
     53  1.53    simonb 
     54  1.94      matt struct pridtab {
     55  1.94      matt 	int	cpu_cid;
     56  1.94      matt 	int	cpu_pid;
     57  1.94      matt 	int	cpu_rev;	/* -1 == wildcard */
     58  1.94      matt 	int	cpu_copts;	/* -1 == wildcard */
     59  1.94      matt 	int	cpu_isa;	/* -1 == probed (mips32/mips64) */
     60  1.94      matt 	int	cpu_ntlb;	/* -1 == unknown, 0 == probed */
     61  1.94      matt 	int	cpu_flags;
     62  1.94      matt 	u_int	cpu_cp0flags;	/* presence of some cp0 regs */
     63  1.94      matt 	u_int	cpu_cidflags;	/* company-specific flags */
     64  1.94      matt 	const char	*cpu_name;
     65  1.94      matt };
     66  1.94      matt 
     67  1.94      matt extern const struct pridtab *mycpu;
     68  1.94      matt 
     69  1.94      matt /*
     70  1.94      matt  * bitfield defines for cpu_cp0flags
     71  1.94      matt  */
     72  1.94      matt #define  MIPS_CP0FL_USE		__BIT(0)	/* use these flags */
     73  1.94      matt #define  MIPS_CP0FL_ECC		__BIT(1)
     74  1.94      matt #define  MIPS_CP0FL_CACHE_ERR	__BIT(2)
     75  1.94      matt #define  MIPS_CP0FL_EIRR	__BIT(3)
     76  1.94      matt #define  MIPS_CP0FL_EIMR	__BIT(4)
     77  1.94      matt #define  MIPS_CP0FL_EBASE	__BIT(5)
     78  1.94      matt #define  MIPS_CP0FL_CONFIG	__BIT(6)
     79  1.94      matt #define  MIPS_CP0FL_CONFIGn(n)	(__BIT(7) << ((n) & 7))
     80  1.94      matt 
     81  1.94      matt /*
     82  1.94      matt  * cpu_cidflags defines, by company
     83  1.94      matt  */
     84  1.94      matt /*
     85  1.94      matt  * RMI company-specific cpu_cidflags
     86  1.94      matt  */
     87  1.94      matt #define MIPS_CIDFL_RMI_TYPE     __BITS(0,2)
     88  1.94      matt #define  CIDFL_RMI_TYPE_XLR     0
     89  1.94      matt #define  CIDFL_RMI_TYPE_XLS     1
     90  1.94      matt #define  CIDFL_RMI_TYPE_XLP     2
     91  1.94      matt 
     92  1.94      matt 
     93  1.53    simonb struct cpu_info {
     94  1.73      yamt 	struct cpu_data ci_data;	/* MI per-cpu data */
     95  1.85        ad 	struct cpu_info *ci_next;	/* Next CPU in list */
     96  1.85        ad 	cpuid_t ci_cpuid;		/* Machine-level identifier */
     97  1.58    simonb 	u_long ci_cpu_freq;		/* CPU frequency */
     98  1.58    simonb 	u_long ci_cycles_per_hz;	/* CPU freq / hz */
     99  1.58    simonb 	u_long ci_divisor_delay;	/* for delay/DELAY */
    100  1.90   tsutsui 	u_long ci_divisor_recip;	/* unused, for obsolete microtime(9) */
    101  1.82      yamt 	struct lwp *ci_curlwp;		/* currently running lwp */
    102  1.82      yamt 	struct lwp *ci_fpcurlwp;	/* the current FPU owner */
    103  1.82      yamt 	int ci_want_resched;		/* user preemption pending */
    104  1.78        ad 	int ci_mtx_count;		/* negative count of held mutexes */
    105  1.78        ad 	int ci_mtx_oldspl;		/* saved SPL value */
    106  1.86        ad 	int ci_idepth;			/* hardware interrupt depth */
    107  1.53    simonb };
    108  1.68    simonb 
    109  1.85        ad #define	CPU_INFO_ITERATOR		int
    110  1.85        ad #define	CPU_INFO_FOREACH(cii, ci)	\
    111  1.85        ad     (void)(cii), ci = &cpu_info_store; ci != NULL; ci = ci->ci_next
    112  1.85        ad 
    113  1.68    simonb #endif /* !_LOCORE */
    114  1.68    simonb #endif /* _KERNEL */
    115  1.53    simonb 
    116  1.36     soren /*
    117  1.36     soren  * CTL_MACHDEP definitions.
    118  1.36     soren  */
    119  1.36     soren #define CPU_CONSDEV		1	/* dev_t: console terminal device */
    120  1.36     soren #define CPU_BOOTED_KERNEL	2	/* string: booted kernel name */
    121  1.36     soren #define CPU_ROOT_DEVICE		3	/* string: root device name */
    122  1.66  gmcgarry #define CPU_LLSC		4	/* OS/CPU supports LL/SC instruction */
    123  1.43     jeffs 
    124  1.43     jeffs /*
    125  1.51       wiz  * Platform can override, but note this breaks userland compatibility
    126  1.43     jeffs  * with other mips platforms.
    127  1.43     jeffs  */
    128  1.43     jeffs #ifndef CPU_MAXID
    129  1.67      shin #define CPU_MAXID		5	/* number of valid machdep ids */
    130  1.36     soren 
    131  1.42     jeffs #endif
    132  1.33    simonb 
    133  1.33    simonb #ifdef _KERNEL
    134  1.87        he #if defined(_LKM) || defined(_STANDALONE)
    135  1.87        he /* Assume all CPU architectures are valid for LKM's and standlone progs */
    136  1.77   tsutsui #define	MIPS1	1
    137  1.77   tsutsui #define	MIPS3	1
    138  1.77   tsutsui #define	MIPS4	1
    139  1.77   tsutsui #define	MIPS32	1
    140  1.77   tsutsui #define	MIPS64	1
    141  1.77   tsutsui #endif
    142  1.77   tsutsui 
    143  1.77   tsutsui #if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64) == 0
    144  1.77   tsutsui #error at least one of MIPS1, MIPS3, MIPS4, MIPS32 or MIPS64 must be specified
    145  1.77   tsutsui #endif
    146  1.53    simonb 
    147  1.77   tsutsui /* Shortcut for MIPS3 or above defined */
    148  1.77   tsutsui #if defined(MIPS3) || defined(MIPS4) || defined(MIPS32) || defined(MIPS64)
    149  1.77   tsutsui #define	MIPS3_PLUS	1
    150  1.77   tsutsui #else
    151  1.77   tsutsui #undef MIPS3_PLUS
    152  1.77   tsutsui #endif
    153  1.33    simonb 
    154  1.33    simonb /*
    155  1.21  jonathan  * Macros to find the CPU architecture we're on at run-time,
    156  1.21  jonathan  * or if possible, at compile-time.
    157  1.21  jonathan  */
    158  1.21  jonathan 
    159  1.58    simonb #define	CPU_ARCH_MIPSx	0		/* XXX unknown */
    160  1.46       cgd #define	CPU_ARCH_MIPS1	(1 << 0)
    161  1.46       cgd #define	CPU_ARCH_MIPS2	(1 << 1)
    162  1.46       cgd #define	CPU_ARCH_MIPS3	(1 << 2)
    163  1.46       cgd #define	CPU_ARCH_MIPS4	(1 << 3)
    164  1.46       cgd #define	CPU_ARCH_MIPS5	(1 << 4)
    165  1.46       cgd #define	CPU_ARCH_MIPS32	(1 << 5)
    166  1.46       cgd #define	CPU_ARCH_MIPS64	(1 << 6)
    167  1.46       cgd 
    168  1.82      yamt /* Note: must be kept in sync with -ffixed-?? Makefile.mips. */
    169  1.82      yamt #define MIPS_CURLWP             $23
    170  1.82      yamt #define MIPS_CURLWP_QUOTED      "$23"
    171  1.82      yamt #define MIPS_CURLWP_CARD	23
    172  1.82      yamt #define	MIPS_CURLWP_FRAME(x)	FRAME_S7(x)
    173  1.82      yamt 
    174  1.58    simonb #ifndef _LOCORE
    175  1.82      yamt 
    176  1.77   tsutsui extern struct cpu_info cpu_info_store;
    177  1.82      yamt register struct lwp *mips_curlwp asm(MIPS_CURLWP_QUOTED);
    178  1.77   tsutsui 
    179  1.82      yamt #define	curlwp			mips_curlwp
    180  1.82      yamt #define	curcpu()		(curlwp->l_cpu)
    181  1.92     rmind #define	curpcb			((struct pcb *)lwp_getpcb(curlwp))
    182  1.82      yamt #define	fpcurlwp		(curcpu()->ci_fpcurlwp)
    183  1.82      yamt #define	cpu_number()		(0)
    184  1.94      matt #define	cpu_proc_fork(p1, p2)	((void)((p2)->p_md.md_abi = (p1)->p_md.md_abi))
    185  1.77   tsutsui 
    186  1.58    simonb /* XXX simonb
    187  1.58    simonb  * Should the following be in a cpu_info type structure?
    188  1.58    simonb  * And how many of these are per-cpu vs. per-system?  (Ie,
    189  1.58    simonb  * we can assume that all cpus have the same mmu-type, but
    190  1.58    simonb  * maybe not that all cpus run at the same clock speed.
    191  1.58    simonb  * Some SGI's apparently support R12k and R14k in the same
    192  1.58    simonb  * box.)
    193  1.58    simonb  */
    194  1.58    simonb extern int cpu_arch;
    195  1.58    simonb extern int mips_cpu_flags;
    196  1.58    simonb extern int mips_has_r4k_mmu;
    197  1.58    simonb extern int mips_has_llsc;
    198  1.58    simonb extern int mips3_pg_cached;
    199  1.94      matt #ifdef _LP64
    200  1.94      matt extern uint64_t mips3_xkphys_cached;
    201  1.94      matt #endif
    202  1.74   tsutsui extern u_int mips3_pg_shift;
    203  1.58    simonb 
    204  1.58    simonb #define	CPU_MIPS_R4K_MMU		0x0001
    205  1.58    simonb #define	CPU_MIPS_NO_LLSC		0x0002
    206  1.58    simonb #define	CPU_MIPS_CAUSE_IV		0x0004
    207  1.58    simonb #define	CPU_MIPS_HAVE_SPECIAL_CCA	0x0008	/* Defaults to '3' if not set. */
    208  1.58    simonb #define	CPU_MIPS_CACHED_CCA_MASK	0x0070
    209  1.58    simonb #define	CPU_MIPS_CACHED_CCA_SHIFT	 4
    210  1.62    simonb #define	CPU_MIPS_DOUBLE_COUNT		0x0080	/* 1 cp0 count == 2 clock cycles */
    211  1.63    simonb #define	CPU_MIPS_USE_WAIT		0x0100	/* Use "wait"-based cpu_idle() */
    212  1.63    simonb #define	CPU_MIPS_NO_WAIT		0x0200	/* Inverse of previous, for mips32/64 */
    213  1.69    simonb #define	CPU_MIPS_D_CACHE_COHERENT	0x0400	/* D-cache is fully coherent */
    214  1.69    simonb #define	CPU_MIPS_I_D_CACHE_COHERENT	0x0800	/* I-cache funcs don't need to flush the D-cache */
    215  1.94      matt #define	CPU_MIPS_NO_LLADDR		0x1000
    216  1.94      matt #define	CPU_MIPS_HAVE_MxCR		0x2000	/* have mfcr, mtcr insns */
    217  1.58    simonb #define	MIPS_NOT_SUPP			0x8000
    218  1.60    simonb 
    219  1.78        ad #endif	/* !_LOCORE */
    220  1.78        ad 
    221  1.78        ad #if ((MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64) == 1) || defined(_LOCORE)
    222  1.78        ad 
    223  1.78        ad #if defined(MIPS1)
    224  1.78        ad 
    225  1.58    simonb # define CPUISMIPS3		0
    226  1.58    simonb # define CPUIS64BITS		0
    227  1.58    simonb # define CPUISMIPS32		0
    228  1.58    simonb # define CPUISMIPS64		0
    229  1.58    simonb # define CPUISMIPSNN		0
    230  1.58    simonb # define MIPS_HAS_R4K_MMU	0
    231  1.58    simonb # define MIPS_HAS_CLOCK		0
    232  1.58    simonb # define MIPS_HAS_LLSC		0
    233  1.94      matt # define MIPS_HAS_LLADDR	0
    234  1.58    simonb 
    235  1.78        ad #elif defined(MIPS3) || defined(MIPS4)
    236  1.78        ad 
    237  1.58    simonb # define CPUISMIPS3		1
    238  1.58    simonb # define CPUIS64BITS		1
    239  1.58    simonb # define CPUISMIPS32		0
    240  1.58    simonb # define CPUISMIPS64		0
    241  1.58    simonb # define CPUISMIPSNN		0
    242  1.58    simonb # define MIPS_HAS_R4K_MMU	1
    243  1.58    simonb # define MIPS_HAS_CLOCK		1
    244  1.78        ad # if defined(_LOCORE)
    245  1.78        ad #  if !defined(MIPS3_5900) && !defined(MIPS3_4100)
    246  1.78        ad #   define MIPS_HAS_LLSC	1
    247  1.78        ad #  else
    248  1.78        ad #   define MIPS_HAS_LLSC	0
    249  1.78        ad #  endif
    250  1.78        ad # else	/* _LOCORE */
    251  1.78        ad #  define MIPS_HAS_LLSC		(mips_has_llsc)
    252  1.78        ad # endif	/* _LOCORE */
    253  1.94      matt # define MIPS_HAS_LLADDR	((mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
    254  1.78        ad 
    255  1.78        ad #elif defined(MIPS32)
    256  1.58    simonb 
    257  1.58    simonb # define CPUISMIPS3		1
    258  1.58    simonb # define CPUIS64BITS		0
    259  1.58    simonb # define CPUISMIPS32		1
    260  1.58    simonb # define CPUISMIPS64		0
    261  1.58    simonb # define CPUISMIPSNN		1
    262  1.58    simonb # define MIPS_HAS_R4K_MMU	1
    263  1.58    simonb # define MIPS_HAS_CLOCK		1
    264  1.58    simonb # define MIPS_HAS_LLSC		1
    265  1.94      matt # define MIPS_HAS_LLADDR	((mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
    266  1.58    simonb 
    267  1.80     oster #elif defined(MIPS64)
    268  1.78        ad 
    269  1.58    simonb # define CPUISMIPS3		1
    270  1.58    simonb # define CPUIS64BITS		1
    271  1.58    simonb # define CPUISMIPS32		0
    272  1.58    simonb # define CPUISMIPS64		1
    273  1.58    simonb # define CPUISMIPSNN		1
    274  1.58    simonb # define MIPS_HAS_R4K_MMU	1
    275  1.58    simonb # define MIPS_HAS_CLOCK		1
    276  1.58    simonb # define MIPS_HAS_LLSC		1
    277  1.94      matt # define MIPS_HAS_LLADDR	((mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
    278  1.78        ad 
    279  1.78        ad #endif
    280  1.21  jonathan 
    281  1.58    simonb #else /* run-time test */
    282  1.21  jonathan 
    283  1.78        ad #ifndef	_LOCORE
    284  1.78        ad 
    285  1.58    simonb #define	MIPS_HAS_R4K_MMU	(mips_has_r4k_mmu)
    286  1.58    simonb #define	MIPS_HAS_LLSC		(mips_has_llsc)
    287  1.94      matt #define	MIPS_HAS_LLADDR		((mips_cpu_flags & CPU_MIPS_NO_LLADDR) == 0)
    288  1.45       cgd 
    289  1.45       cgd /* This test is ... rather bogus */
    290  1.58    simonb #define	CPUISMIPS3	((cpu_arch & \
    291  1.58    simonb 	(CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64)) != 0)
    292  1.58    simonb 
    293  1.58    simonb /* And these aren't much better while the previous test exists as is... */
    294  1.58    simonb #define	CPUISMIPS32	((cpu_arch & CPU_ARCH_MIPS32) != 0)
    295  1.58    simonb #define	CPUISMIPS64	((cpu_arch & CPU_ARCH_MIPS64) != 0)
    296  1.58    simonb #define	CPUISMIPSNN	((cpu_arch & (CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64)) != 0)
    297  1.58    simonb #define	CPUIS64BITS	((cpu_arch & \
    298  1.58    simonb 	(CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS64)) != 0)
    299  1.58    simonb 
    300  1.58    simonb #define	MIPS_HAS_CLOCK	(cpu_arch >= CPU_ARCH_MIPS3)
    301  1.78        ad 
    302  1.78        ad #else	/* !_LOCORE */
    303  1.78        ad 
    304  1.78        ad #define	MIPS_HAS_LLSC	0
    305  1.78        ad 
    306  1.78        ad #endif	/* !_LOCORE */
    307  1.78        ad 
    308  1.21  jonathan #endif /* run-time test */
    309  1.21  jonathan 
    310  1.78        ad #ifndef	_LOCORE
    311  1.58    simonb 
    312  1.21  jonathan /*
    313   1.1   deraadt  * definitions of cpu-dependent requirements
    314   1.1   deraadt  * referenced in generic code
    315   1.1   deraadt  */
    316  1.42     jeffs 
    317  1.94      matt void cpu_intr(uint32_t, uint32_t, vaddr_t, uint32_t);
    318   1.1   deraadt 
    319   1.1   deraadt /*
    320   1.1   deraadt  * Arguments to hardclock and gatherstats encapsulate the previous
    321   1.1   deraadt  * machine state in an opaque clockframe.
    322   1.1   deraadt  */
    323   1.5     glass struct clockframe {
    324  1.94      matt 	vaddr_t	pc;	/* program counter at time of interrupt */
    325  1.94      matt 	uint32_t	sr;	/* status register at time of interrupt */
    326  1.94      matt 	u_int		ppl;	/* previous priority level at time of interrupt */
    327   1.5     glass };
    328   1.1   deraadt 
    329  1.14  jonathan /*
    330  1.79        ad  * A port must provde CLKF_USERMODE() for use in machine-independent code.
    331  1.79        ad  * These differ on r4000 and r3000 systems; provide them in the
    332  1.79        ad  * port-dependent file that includes this one, using the macros below.
    333  1.14  jonathan  */
    334  1.14  jonathan 
    335  1.21  jonathan /* mips1 versions */
    336  1.22  jonathan #define	MIPS1_CLKF_USERMODE(framep)	((framep)->sr & MIPS_SR_KU_PREV)
    337  1.14  jonathan 
    338  1.21  jonathan /* mips3 versions */
    339  1.22  jonathan #define	MIPS3_CLKF_USERMODE(framep)	((framep)->sr & MIPS_SR_KSU_USER)
    340  1.56       uch 
    341   1.1   deraadt #define	CLKF_PC(framep)		((framep)->pc)
    342   1.1   deraadt #define	CLKF_INTR(framep)	(0)
    343  1.18  jonathan 
    344  1.58    simonb #if defined(MIPS3_PLUS) && !defined(MIPS1)		/* XXX bogus! */
    345  1.21  jonathan #define	CLKF_USERMODE(framep)	MIPS3_CLKF_USERMODE(framep)
    346  1.21  jonathan #endif
    347  1.21  jonathan 
    348  1.58    simonb #if !defined(MIPS3_PLUS) && defined(MIPS1)		/* XXX bogus! */
    349  1.21  jonathan #define	CLKF_USERMODE(framep)	MIPS1_CLKF_USERMODE(framep)
    350  1.21  jonathan #endif
    351  1.21  jonathan 
    352  1.58    simonb #if defined(MIPS3_PLUS) && defined(MIPS1)		/* XXX bogus! */
    353  1.21  jonathan #define CLKF_USERMODE(framep) \
    354  1.21  jonathan     ((CPUISMIPS3) ? MIPS3_CLKF_USERMODE(framep):  MIPS1_CLKF_USERMODE(framep))
    355  1.18  jonathan #endif
    356  1.18  jonathan 
    357  1.47   thorpej /*
    358  1.47   thorpej  * This is used during profiling to integrate system time.  It can safely
    359  1.47   thorpej  * assume that the process is resident.
    360  1.47   thorpej  */
    361  1.48   thorpej #define	PROC_PC(p)							\
    362  1.48   thorpej 	(((struct frame *)(p)->p_md.md_regs)->f_regs[37])	/* XXX PC */
    363   1.1   deraadt 
    364   1.1   deraadt /*
    365   1.1   deraadt  * Preempt the current process if in interrupt from user mode,
    366   1.1   deraadt  * or after the current trap/syscall if in system mode.
    367   1.1   deraadt  */
    368  1.82      yamt void	cpu_need_resched(struct cpu_info *, int);
    369   1.1   deraadt 
    370   1.1   deraadt /*
    371   1.1   deraadt  * Give a profiling tick to the current process when the user profiling
    372  1.13  jonathan  * buffer pages are invalid.  On the MIPS, request an ast to send us
    373   1.1   deraadt  * through trap, marking the proc as needing a profiling tick.
    374   1.1   deraadt  */
    375  1.78        ad #define	cpu_need_proftick(l)						\
    376  1.50   thorpej do {									\
    377  1.78        ad 	(l)->l_pflag |= LP_OWEUPC;					\
    378  1.78        ad 	aston(l);							\
    379  1.50   thorpej } while (/*CONSTCOND*/0)
    380   1.1   deraadt 
    381   1.1   deraadt /*
    382  1.81    simonb  * Notify the current lwp (l) that it has a signal pending,
    383   1.1   deraadt  * process as soon as possible.
    384   1.1   deraadt  */
    385  1.81    simonb #define	cpu_signotify(l)	aston(l)
    386   1.1   deraadt 
    387  1.78        ad #define aston(l)		((l)->l_md.md_astpending = 1)
    388   1.1   deraadt 
    389  1.23   thorpej /*
    390  1.37    simonb  * Misc prototypes and variable declarations.
    391  1.23   thorpej  */
    392  1.70   thorpej struct lwp;
    393  1.93     rmind struct pcb;
    394  1.37    simonb 
    395  1.68    simonb extern struct segtab *segbase;	/* current segtab base */
    396  1.25  jonathan 
    397  1.94      matt /* copy.S */
    398  1.94      matt int8_t	ufetch_int8(void *);
    399  1.94      matt int16_t	ufetch_int16(void *);
    400  1.94      matt int32_t ufetch_int32(void *);
    401  1.94      matt uint8_t	ufetch_uint8(void *);
    402  1.94      matt uint16_t ufetch_uint16(void *);
    403  1.94      matt uint32_t ufetch_uint32(void *);
    404  1.94      matt int8_t	ufetch_int8_intrsafe(void *);
    405  1.94      matt int16_t	ufetch_int16_intrsafe(void *);
    406  1.94      matt int32_t ufetch_int32_intrsafe(void *);
    407  1.94      matt uint8_t	ufetch_uint8_intrsafe(void *);
    408  1.94      matt uint16_t ufetch_uint16_intrsafe(void *);
    409  1.94      matt uint32_t ufetch_uint32_intrsafe(void *);
    410  1.94      matt #ifdef _LP64
    411  1.94      matt int64_t ufetch_int64(void *);
    412  1.94      matt uint64_t ufetch_uint64(void *);
    413  1.94      matt int64_t ufetch_int64_intrsafe(void *);
    414  1.94      matt uint64_t ufetch_uint64_intrsafe(void *);
    415  1.94      matt #endif
    416  1.94      matt char	ufetch_char(void *);
    417  1.94      matt short	ufetch_short(void *);
    418  1.94      matt int	ufetch_int(void *);
    419  1.94      matt long	ufetch_long(void *);
    420  1.94      matt char	ufetch_char_intrsafe(void *);
    421  1.94      matt short	ufetch_short_intrsafe(void *);
    422  1.94      matt int	ufetch_int_intrsafe(void *);
    423  1.94      matt long	ufetch_long_intrsafe(void *);
    424  1.94      matt 
    425  1.94      matt u_char	ufetch_uchar(void *);
    426  1.94      matt u_short	ufetch_ushort(void *);
    427  1.94      matt u_int	ufetch_uint(void *);
    428  1.94      matt u_long	ufetch_ulong(void *);
    429  1.94      matt u_char	ufetch_uchar_intrsafe(void *);
    430  1.94      matt u_short	ufetch_ushort_intrsafe(void *);
    431  1.94      matt u_int	ufetch_uint_intrsafe(void *);
    432  1.94      matt u_long	ufetch_ulong_intrsafe(void *);
    433  1.94      matt void 	*ufetch_ptr(void *);
    434  1.94      matt 
    435  1.94      matt int	ustore_int8(void *, int8_t);
    436  1.94      matt int	ustore_int16(void *, int16_t);
    437  1.94      matt int	ustore_int32(void *, int32_t);
    438  1.94      matt int	ustore_uint8(void *, uint8_t);
    439  1.94      matt int	ustore_uint16(void *, uint16_t);
    440  1.94      matt int	ustore_uint32(void *, uint32_t);
    441  1.94      matt int	ustore_int8_intrsafe(void *, int8_t);
    442  1.94      matt int	ustore_int16_intrsafe(void *, int16_t);
    443  1.94      matt int	ustore_int32_intrsafe(void *, int32_t);
    444  1.94      matt int	ustore_uint8_intrsafe(void *, uint8_t);
    445  1.94      matt int	ustore_uint16_intrsafe(void *, uint16_t);
    446  1.94      matt int	ustore_uint32_intrsafe(void *, uint32_t);
    447  1.94      matt #ifdef _LP64
    448  1.94      matt int	ustore_int64(void *, int64_t);
    449  1.94      matt int	ustore_uint64(void *, uint64_t);
    450  1.94      matt int	ustore_int64_intrsafe(void *, int64_t);
    451  1.94      matt int	ustore_uint64_intrsafe(void *, uint64_t);
    452  1.94      matt #endif
    453  1.94      matt int	ustore_char(void *, char);
    454  1.94      matt int	ustore_char_intrsafe(void *, char);
    455  1.94      matt int	ustore_short(void *, short);
    456  1.94      matt int	ustore_short_intrsafe(void *, short);
    457  1.94      matt int	ustore_int(void *, int);
    458  1.94      matt int	ustore_int_intrsafe(void *, int);
    459  1.94      matt int	ustore_long(void *, long);
    460  1.94      matt int	ustore_long_intrsafe(void *, long);
    461  1.94      matt int	ustore_uchar(void *, u_char);
    462  1.94      matt int	ustore_uchar_intrsafe(void *, u_char);
    463  1.94      matt int	ustore_ushort(void *, u_short);
    464  1.94      matt int	ustore_ushort_intrsafe(void *, u_short);
    465  1.94      matt int	ustore_uint(void *, u_int);
    466  1.94      matt int	ustore_uint_intrsafe(void *, u_int);
    467  1.94      matt int	ustore_ulong(void *, u_long);
    468  1.94      matt int	ustore_ulong_intrsafe(void *, u_long);
    469  1.94      matt int 	ustore_ptr(void *, void *);
    470  1.94      matt int	ustore_ptr_intrsafe(void *, void *);
    471  1.94      matt 
    472  1.94      matt int	ustore_uint32_isync(void *, uint32_t);
    473  1.94      matt 
    474  1.28    castor /* trap.c */
    475  1.58    simonb void	netintr(void);
    476  1.58    simonb int	kdbpeek(vaddr_t);
    477  1.23   thorpej 
    478  1.28    castor /* mips_machdep.c */
    479  1.58    simonb void	dumpsys(void);
    480  1.93     rmind int	savectx(struct pcb *);
    481  1.58    simonb void	mips_init_msgbuf(void);
    482  1.94      matt void	mips_init_lwp0_uarea(void);
    483  1.70   thorpej void	savefpregs(struct lwp *);
    484  1.70   thorpej void	loadfpregs(struct lwp *);
    485  1.13  jonathan 
    486  1.61    simonb /* locore*.S */
    487  1.58    simonb int	badaddr(void *, size_t);
    488  1.61    simonb int	badaddr64(uint64_t, size_t);
    489  1.25  jonathan 
    490  1.25  jonathan /* mips_machdep.c */
    491  1.58    simonb void	cpu_identify(void);
    492  1.58    simonb void	mips_vector_init(void);
    493  1.27   thorpej 
    494  1.33    simonb #endif /* ! _LOCORE */
    495  1.28    castor #endif /* _KERNEL */
    496   1.1   deraadt #endif /* _CPU_H_ */
    497