cpu.h revision 1.50.2.1
1 /* $NetBSD: cpu.h,v 1.50.2.1 2001/06/21 19:27:55 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell and Rick Macklem. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)cpu.h 8.4 (Berkeley) 1/4/94 39 */ 40 41 #ifndef _CPU_H_ 42 #define _CPU_H_ 43 44 /* 45 * Exported definitions unique to NetBSD/mips cpu support. 46 */ 47 48 /* 49 * CTL_MACHDEP definitions. 50 */ 51 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 52 #define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */ 53 #define CPU_ROOT_DEVICE 3 /* string: root device name */ 54 55 /* 56 * Platform can override, but note this breaks userland compatibility 57 * with other mips platforms. 58 */ 59 #ifndef CPU_MAXID 60 #define CPU_MAXID 4 /* number of valid machdep ids */ 61 62 #define CTL_MACHDEP_NAMES { \ 63 { 0, 0 }, \ 64 { "console_device", CTLTYPE_STRUCT }, \ 65 { "booted_kernel", CTLTYPE_STRING }, \ 66 { "root_device", CTLTYPE_STRING }, \ 67 } 68 #endif 69 70 #ifdef _KERNEL 71 #ifndef _LOCORE 72 73 /* 74 * Macros to find the CPU architecture we're on at run-time, 75 * or if possible, at compile-time. 76 */ 77 78 extern int cpu_arch; 79 80 #define CPU_ARCH_MIPS1 (1 << 0) 81 #define CPU_ARCH_MIPS2 (1 << 1) 82 #define CPU_ARCH_MIPS3 (1 << 2) 83 #define CPU_ARCH_MIPS4 (1 << 3) 84 #define CPU_ARCH_MIPS5 (1 << 4) 85 #define CPU_ARCH_MIPS32 (1 << 5) 86 #define CPU_ARCH_MIPS64 (1 << 6) 87 88 #if (MIPS1 + MIPS3) == 1 89 #ifdef MIPS1 90 # define CPUISMIPS3 0 91 #endif /* mips1 */ 92 93 #ifdef MIPS3 94 # define CPUISMIPS3 1 95 #endif /* mips1 */ 96 97 #else /* run-time test */ 98 99 /* This test is ... rather bogus */ 100 #define CPUISMIPS3 ((cpu_arch & (CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4)) != 0) 101 #endif /* run-time test */ 102 103 /* 104 * definitions of cpu-dependent requirements 105 * referenced in generic code 106 */ 107 #define cpu_wait(p) /* nothing */ 108 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 109 110 void cpu_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t)); 111 112 /* 113 * Arguments to hardclock and gatherstats encapsulate the previous 114 * machine state in an opaque clockframe. 115 */ 116 struct clockframe { 117 int pc; /* program counter at time of interrupt */ 118 int sr; /* status register at time of interrupt */ 119 }; 120 121 /* 122 * A port must provde CLKF_USERMODE() and CLKF_BASEPRI() for use 123 * in machine-independent code. These differ on r4000 and r3000 systems; 124 * provide them in the port-dependent file that includes this one, using 125 * the macros below. 126 */ 127 128 /* mips1 versions */ 129 #define MIPS1_CLKF_USERMODE(framep) ((framep)->sr & MIPS_SR_KU_PREV) 130 #define MIPS1_CLKF_BASEPRI(framep) \ 131 ((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_ENA_PREV)) == 0) 132 133 /* mips3 versions */ 134 #define MIPS3_CLKF_USERMODE(framep) ((framep)->sr & MIPS_SR_KSU_USER) 135 #define MIPS3_CLKF_BASEPRI(framep) \ 136 ((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_IE)) == 0) 137 138 #define CLKF_PC(framep) ((framep)->pc) 139 #define CLKF_INTR(framep) (0) 140 141 #if defined(MIPS3) && !defined(MIPS1) 142 #define CLKF_USERMODE(framep) MIPS3_CLKF_USERMODE(framep) 143 #define CLKF_BASEPRI(framep) MIPS3_CLKF_BASEPRI(framep) 144 #endif 145 146 #if !defined(MIPS3) && defined(MIPS1) 147 #define CLKF_USERMODE(framep) MIPS1_CLKF_USERMODE(framep) 148 #define CLKF_BASEPRI(framep) MIPS1_CLKF_BASEPRI(framep) 149 #endif 150 151 #if defined(MIPS3) && defined(MIPS1) 152 #define CLKF_USERMODE(framep) \ 153 ((CPUISMIPS3) ? MIPS3_CLKF_USERMODE(framep): MIPS1_CLKF_USERMODE(framep)) 154 #define CLKF_BASEPRI(framep) \ 155 ((CPUISMIPS3) ? MIPS3_CLKF_BASEPRI(framep): MIPS1_CLKF_BASEPRI(framep)) 156 #endif 157 158 /* 159 * This is used during profiling to integrate system time. It can safely 160 * assume that the process is resident. 161 */ 162 #define PROC_PC(p) \ 163 (((struct frame *)(p)->p_md.md_regs)->f_regs[37]) /* XXX PC */ 164 165 /* 166 * Preempt the current process if in interrupt from user mode, 167 * or after the current trap/syscall if in system mode. 168 */ 169 #define need_resched(ci) \ 170 do { \ 171 want_resched = 1; \ 172 if (curproc != NULL) \ 173 aston(curproc); \ 174 } while (/*CONSTCOND*/0) 175 176 /* 177 * Give a profiling tick to the current process when the user profiling 178 * buffer pages are invalid. On the MIPS, request an ast to send us 179 * through trap, marking the proc as needing a profiling tick. 180 */ 181 #define need_proftick(p) \ 182 do { \ 183 (p)->p_flag |= P_OWEUPC; \ 184 aston(p); \ 185 } while (/*CONSTCOND*/0) 186 187 /* 188 * Notify the current process (p) that it has a signal pending, 189 * process as soon as possible. 190 */ 191 #define signotify(p) aston(p) 192 193 #define aston(p) ((p)->p_md.md_astpending = 1) 194 195 extern int want_resched; /* resched() was called */ 196 #ifdef MIPS3 197 extern u_int mips_L2CacheSize; 198 extern int mips_L2CacheIsSnooping; /* L2 cache snoops uncached writes ? */ 199 extern int mips_L2CacheMixed; 200 #endif /* MIPS3 */ 201 202 /* 203 * Misc prototypes and variable declarations. 204 */ 205 struct proc; 206 struct user; 207 208 extern struct proc *fpcurproc; 209 210 /* trap.c */ 211 void netintr __P((void)); 212 int kdbpeek __P((vaddr_t)); 213 214 /* mips_machdep.c */ 215 void dumpsys __P((void)); 216 int savectx __P((struct user *)); 217 void mips_init_msgbuf __P((void)); 218 void savefpregs __P((struct proc *)); 219 void loadfpregs __P((struct proc *)); 220 221 /* locore.S */ 222 int badaddr __P((void *, size_t)); 223 224 /* mips_machdep.c */ 225 void cpu_identify __P((void)); 226 void mips_vector_init __P((void)); 227 228 #endif /* ! _LOCORE */ 229 #endif /* _KERNEL */ 230 231 #endif /* _CPU_H_ */ 232
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