cpu.h revision 1.53
1 /* $NetBSD: cpu.h,v 1.53 2001/09/04 06:19:22 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell and Rick Macklem. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)cpu.h 8.4 (Berkeley) 1/4/94 39 */ 40 41 #ifndef _CPU_H_ 42 #define _CPU_H_ 43 44 #include <sys/sched.h> 45 46 /* 47 * Exported definitions unique to NetBSD/mips cpu support. 48 */ 49 50 #ifndef _LOCORE 51 #if defined(_KERNEL_OPT) 52 #include "opt_lockdebug.h" 53 #endif 54 55 struct cpu_info { 56 struct schedstate_percpu ci_schedstate; /* scheduler state */ 57 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 58 u_long ci_spin_locks; /* # of spin locks held */ 59 u_long ci_simple_locks; /* # of simple locks held */ 60 #endif 61 }; 62 #endif /* !defined(_LOCORE) */ 63 64 /* 65 * CTL_MACHDEP definitions. 66 */ 67 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 68 #define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */ 69 #define CPU_ROOT_DEVICE 3 /* string: root device name */ 70 71 /* 72 * Platform can override, but note this breaks userland compatibility 73 * with other mips platforms. 74 */ 75 #ifndef CPU_MAXID 76 #define CPU_MAXID 4 /* number of valid machdep ids */ 77 78 #define CTL_MACHDEP_NAMES { \ 79 { 0, 0 }, \ 80 { "console_device", CTLTYPE_STRUCT }, \ 81 { "booted_kernel", CTLTYPE_STRING }, \ 82 { "root_device", CTLTYPE_STRING }, \ 83 } 84 #endif 85 86 #ifdef _KERNEL 87 #ifndef _LOCORE 88 extern struct cpu_info cpu_info_store; 89 90 #define curcpu() (&cpu_info_store) 91 #define cpu_number() (0) 92 93 /* 94 * Macros to find the CPU architecture we're on at run-time, 95 * or if possible, at compile-time. 96 */ 97 98 extern int cpu_arch; 99 100 #define CPU_ARCH_MIPS1 (1 << 0) 101 #define CPU_ARCH_MIPS2 (1 << 1) 102 #define CPU_ARCH_MIPS3 (1 << 2) 103 #define CPU_ARCH_MIPS4 (1 << 3) 104 #define CPU_ARCH_MIPS5 (1 << 4) 105 #define CPU_ARCH_MIPS32 (1 << 5) 106 #define CPU_ARCH_MIPS64 (1 << 6) 107 108 #if (MIPS1 + MIPS3) == 1 109 #ifdef MIPS1 110 # define CPUISMIPS3 0 111 #endif /* mips1 */ 112 113 #ifdef MIPS3 114 # define CPUISMIPS3 1 115 #endif /* mips1 */ 116 117 #else /* run-time test */ 118 119 /* This test is ... rather bogus */ 120 #define CPUISMIPS3 ((cpu_arch & (CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4)) != 0) 121 #endif /* run-time test */ 122 123 /* 124 * definitions of cpu-dependent requirements 125 * referenced in generic code 126 */ 127 #define cpu_wait(p) /* nothing */ 128 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 129 130 void cpu_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t)); 131 132 /* 133 * Arguments to hardclock and gatherstats encapsulate the previous 134 * machine state in an opaque clockframe. 135 */ 136 struct clockframe { 137 int pc; /* program counter at time of interrupt */ 138 int sr; /* status register at time of interrupt */ 139 }; 140 141 /* 142 * A port must provde CLKF_USERMODE() and CLKF_BASEPRI() for use 143 * in machine-independent code. These differ on r4000 and r3000 systems; 144 * provide them in the port-dependent file that includes this one, using 145 * the macros below. 146 */ 147 148 /* mips1 versions */ 149 #define MIPS1_CLKF_USERMODE(framep) ((framep)->sr & MIPS_SR_KU_PREV) 150 #define MIPS1_CLKF_BASEPRI(framep) \ 151 ((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_ENA_PREV)) == 0) 152 153 /* mips3 versions */ 154 #define MIPS3_CLKF_USERMODE(framep) ((framep)->sr & MIPS_SR_KSU_USER) 155 #define MIPS3_CLKF_BASEPRI(framep) \ 156 ((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_IE)) == 0) 157 158 #define CLKF_PC(framep) ((framep)->pc) 159 #define CLKF_INTR(framep) (0) 160 161 #if defined(MIPS3) && !defined(MIPS1) 162 #define CLKF_USERMODE(framep) MIPS3_CLKF_USERMODE(framep) 163 #define CLKF_BASEPRI(framep) MIPS3_CLKF_BASEPRI(framep) 164 #endif 165 166 #if !defined(MIPS3) && defined(MIPS1) 167 #define CLKF_USERMODE(framep) MIPS1_CLKF_USERMODE(framep) 168 #define CLKF_BASEPRI(framep) MIPS1_CLKF_BASEPRI(framep) 169 #endif 170 171 #if defined(MIPS3) && defined(MIPS1) 172 #define CLKF_USERMODE(framep) \ 173 ((CPUISMIPS3) ? MIPS3_CLKF_USERMODE(framep): MIPS1_CLKF_USERMODE(framep)) 174 #define CLKF_BASEPRI(framep) \ 175 ((CPUISMIPS3) ? MIPS3_CLKF_BASEPRI(framep): MIPS1_CLKF_BASEPRI(framep)) 176 #endif 177 178 /* 179 * This is used during profiling to integrate system time. It can safely 180 * assume that the process is resident. 181 */ 182 #define PROC_PC(p) \ 183 (((struct frame *)(p)->p_md.md_regs)->f_regs[37]) /* XXX PC */ 184 185 /* 186 * Preempt the current process if in interrupt from user mode, 187 * or after the current trap/syscall if in system mode. 188 */ 189 #define need_resched(ci) \ 190 do { \ 191 want_resched = 1; \ 192 if (curproc != NULL) \ 193 aston(curproc); \ 194 } while (/*CONSTCOND*/0) 195 196 /* 197 * Give a profiling tick to the current process when the user profiling 198 * buffer pages are invalid. On the MIPS, request an ast to send us 199 * through trap, marking the proc as needing a profiling tick. 200 */ 201 #define need_proftick(p) \ 202 do { \ 203 (p)->p_flag |= P_OWEUPC; \ 204 aston(p); \ 205 } while (/*CONSTCOND*/0) 206 207 /* 208 * Notify the current process (p) that it has a signal pending, 209 * process as soon as possible. 210 */ 211 #define signotify(p) aston(p) 212 213 #define aston(p) ((p)->p_md.md_astpending = 1) 214 215 extern int want_resched; /* resched() was called */ 216 #ifdef MIPS3 217 extern u_int mips_L2CacheSize; 218 extern int mips_L2CacheIsSnooping; /* L2 cache snoops uncached writes ? */ 219 extern int mips_L2CacheMixed; 220 #endif /* MIPS3 */ 221 222 /* 223 * Misc prototypes and variable declarations. 224 */ 225 struct proc; 226 struct user; 227 228 extern struct proc *fpcurproc; 229 230 /* trap.c */ 231 void netintr __P((void)); 232 int kdbpeek __P((vaddr_t)); 233 234 /* mips_machdep.c */ 235 void dumpsys __P((void)); 236 int savectx __P((struct user *)); 237 void mips_init_msgbuf __P((void)); 238 void savefpregs __P((struct proc *)); 239 void loadfpregs __P((struct proc *)); 240 241 /* locore.S */ 242 int badaddr __P((void *, size_t)); 243 244 /* mips_machdep.c */ 245 void cpu_identify __P((void)); 246 void mips_vector_init __P((void)); 247 248 #endif /* ! _LOCORE */ 249 #endif /* _KERNEL */ 250 251 #endif /* _CPU_H_ */ 252
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