cpu.h revision 1.59
1 /* $NetBSD: cpu.h,v 1.59 2002/03/06 07:31:38 simonb Exp $ */ 2 3 /*- 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell and Rick Macklem. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)cpu.h 8.4 (Berkeley) 1/4/94 39 */ 40 41 #ifndef _CPU_H_ 42 #define _CPU_H_ 43 44 #include <mips/cpuregs.h> 45 46 /* 47 * Exported definitions unique to NetBSD/mips cpu support. 48 */ 49 50 #ifndef _LOCORE 51 #include <sys/sched.h> 52 53 #if defined(_KERNEL_OPT) 54 #include "opt_lockdebug.h" 55 #endif 56 57 struct cpu_info { 58 struct schedstate_percpu ci_schedstate; /* scheduler state */ 59 u_long ci_cpu_freq; /* CPU frequency */ 60 u_long ci_cycles_per_hz; /* CPU freq / hz */ 61 u_long ci_divisor_delay; /* for delay/DELAY */ 62 u_long ci_divisor_recip; /* scaled reciprocal of previous */ 63 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 64 u_long ci_spin_locks; /* # of spin locks held */ 65 u_long ci_simple_locks; /* # of simple locks held */ 66 #endif 67 }; 68 #endif /* !defined(_LOCORE) */ 69 70 /* 71 * CTL_MACHDEP definitions. 72 */ 73 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 74 #define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */ 75 #define CPU_ROOT_DEVICE 3 /* string: root device name */ 76 77 /* 78 * Platform can override, but note this breaks userland compatibility 79 * with other mips platforms. 80 */ 81 #ifndef CPU_MAXID 82 #define CPU_MAXID 4 /* number of valid machdep ids */ 83 84 #define CTL_MACHDEP_NAMES { \ 85 { 0, 0 }, \ 86 { "console_device", CTLTYPE_STRUCT }, \ 87 { "booted_kernel", CTLTYPE_STRING }, \ 88 { "root_device", CTLTYPE_STRING }, \ 89 } 90 #endif 91 92 #ifdef _KERNEL 93 #ifndef _LOCORE 94 extern struct cpu_info cpu_info_store; 95 96 #define curcpu() (&cpu_info_store) 97 #define cpu_number() (0) 98 #endif /* !_LOCORE */ 99 100 /* 101 * Macros to find the CPU architecture we're on at run-time, 102 * or if possible, at compile-time. 103 */ 104 105 #define CPU_ARCH_MIPSx 0 /* XXX unknown */ 106 #define CPU_ARCH_MIPS1 (1 << 0) 107 #define CPU_ARCH_MIPS2 (1 << 1) 108 #define CPU_ARCH_MIPS3 (1 << 2) 109 #define CPU_ARCH_MIPS4 (1 << 3) 110 #define CPU_ARCH_MIPS5 (1 << 4) 111 #define CPU_ARCH_MIPS32 (1 << 5) 112 #define CPU_ARCH_MIPS64 (1 << 6) 113 114 #ifndef _LOCORE 115 /* XXX simonb 116 * Should the following be in a cpu_info type structure? 117 * And how many of these are per-cpu vs. per-system? (Ie, 118 * we can assume that all cpus have the same mmu-type, but 119 * maybe not that all cpus run at the same clock speed. 120 * Some SGI's apparently support R12k and R14k in the same 121 * box.) 122 */ 123 extern int cpu_arch; 124 extern int mips_cpu_flags; 125 extern int mips_has_r4k_mmu; 126 extern int mips_has_llsc; 127 extern int mips3_pg_cached; 128 129 #define CPU_MIPS_R4K_MMU 0x0001 130 #define CPU_MIPS_NO_LLSC 0x0002 131 #define CPU_MIPS_CAUSE_IV 0x0004 132 #define CPU_MIPS_HAVE_SPECIAL_CCA 0x0008 /* Defaults to '3' if not set. */ 133 #define CPU_MIPS_CACHED_CCA_MASK 0x0070 134 #define CPU_MIPS_CACHED_CCA_SHIFT 4 135 #define MIPS_NOT_SUPP 0x8000 136 137 #if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64) == 0 138 #error at least one of MIPS1, MIPS3, MIPS4, MIPS32 or MIPS64 must be specified 139 #endif 140 141 #if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64) == 1 142 #ifdef MIPS1 143 # define CPUISMIPS3 0 144 # define CPUIS64BITS 0 145 # define CPUISMIPS32 0 146 # define CPUISMIPS64 0 147 # define CPUISMIPSNN 0 148 # define MIPS_HAS_R4K_MMU 0 149 # define MIPS_HAS_CLOCK 0 150 # define MIPS_HAS_LLSC 0 151 #endif /* MIPS1 */ 152 153 #if defined(MIPS3) || defined(MIPS4) 154 # define CPUISMIPS3 1 155 # define CPUIS64BITS 1 156 # define CPUISMIPS32 0 157 # define CPUISMIPS64 0 158 # define CPUISMIPSNN 0 159 # define MIPS_HAS_R4K_MMU 1 160 # define MIPS_HAS_CLOCK 1 161 # define MIPS_HAS_LLSC (mips_has_llsc) 162 #endif /* MIPS3 || MIPS4 */ 163 164 #ifdef MIPS32 165 # define CPUISMIPS3 1 166 # define CPUIS64BITS 0 167 # define CPUISMIPS32 1 168 # define CPUISMIPS64 0 169 # define CPUISMIPSNN 1 170 # define MIPS_HAS_R4K_MMU 1 171 # define MIPS_HAS_CLOCK 1 172 # define MIPS_HAS_LLSC 1 173 #endif /* MIPS32 */ 174 175 #ifdef MIPS64 176 # define CPUISMIPS3 1 177 # define CPUIS64BITS 1 178 # define CPUISMIPS32 0 179 # define CPUISMIPS64 1 180 # define CPUISMIPSNN 1 181 # define MIPS_HAS_R4K_MMU 1 182 # define MIPS_HAS_CLOCK 1 183 # define MIPS_HAS_LLSC 1 184 #endif /* MIPS32 */ 185 186 #else /* run-time test */ 187 188 #define MIPS_HAS_R4K_MMU (mips_has_r4k_mmu) 189 #define MIPS_HAS_LLSC (mips_has_llsc) 190 191 /* This test is ... rather bogus */ 192 #define CPUISMIPS3 ((cpu_arch & \ 193 (CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64)) != 0) 194 195 /* And these aren't much better while the previous test exists as is... */ 196 #define CPUISMIPS32 ((cpu_arch & CPU_ARCH_MIPS32) != 0) 197 #define CPUISMIPS64 ((cpu_arch & CPU_ARCH_MIPS64) != 0) 198 #define CPUISMIPSNN ((cpu_arch & (CPU_ARCH_MIPS32 | CPU_ARCH_MIPS64)) != 0) 199 #define CPUIS64BITS ((cpu_arch & \ 200 (CPU_ARCH_MIPS3 | CPU_ARCH_MIPS4 | CPU_ARCH_MIPS64)) != 0) 201 202 #define MIPS_HAS_CLOCK (cpu_arch >= CPU_ARCH_MIPS3) 203 #endif /* run-time test */ 204 205 /* Shortcut for MIPS3 or above defined */ 206 #if defined(MIPS3) || defined(MIPS4) || defined(MIPS32) || defined(MIPS64) 207 #define MIPS3_PLUS 1 208 #else 209 #undef MIPS3_PLUS 210 #endif 211 212 213 /* 214 * definitions of cpu-dependent requirements 215 * referenced in generic code 216 */ 217 #define cpu_wait(p) /* nothing */ 218 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 219 220 void cpu_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t); 221 222 /* 223 * Arguments to hardclock and gatherstats encapsulate the previous 224 * machine state in an opaque clockframe. 225 */ 226 struct clockframe { 227 int pc; /* program counter at time of interrupt */ 228 int sr; /* status register at time of interrupt */ 229 int ppl; /* previous priority level at time of interrupt */ 230 }; 231 232 /* 233 * A port must provde CLKF_USERMODE() and CLKF_BASEPRI() for use 234 * in machine-independent code. These differ on r4000 and r3000 systems; 235 * provide them in the port-dependent file that includes this one, using 236 * the macros below. 237 */ 238 239 /* mips1 versions */ 240 #define MIPS1_CLKF_USERMODE(framep) ((framep)->sr & MIPS_SR_KU_PREV) 241 #define MIPS1_CLKF_BASEPRI(framep) \ 242 ((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_ENA_PREV)) == 0) 243 244 /* mips3 versions */ 245 #define MIPS3_CLKF_USERMODE(framep) ((framep)->sr & MIPS_SR_KSU_USER) 246 #define MIPS3_CLKF_BASEPRI(framep) \ 247 ((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_IE)) == 0) 248 249 #ifdef IPL_ICU_MASK 250 #define ICU_CLKF_BASEPRI(framep) ((framep)->ppl == 0) 251 #endif 252 253 #define CLKF_PC(framep) ((framep)->pc) 254 #define CLKF_INTR(framep) (0) 255 256 #if defined(MIPS3_PLUS) && !defined(MIPS1) /* XXX bogus! */ 257 #define CLKF_USERMODE(framep) MIPS3_CLKF_USERMODE(framep) 258 #define CLKF_BASEPRI(framep) MIPS3_CLKF_BASEPRI(framep) 259 #endif 260 261 #if !defined(MIPS3_PLUS) && defined(MIPS1) /* XXX bogus! */ 262 #define CLKF_USERMODE(framep) MIPS1_CLKF_USERMODE(framep) 263 #define CLKF_BASEPRI(framep) MIPS1_CLKF_BASEPRI(framep) 264 #endif 265 266 #ifdef IPL_ICU_MASK 267 #undef CLKF_BASEPRI 268 #define CLKF_BASEPRI(framep) ICU_CLKF_BASEPRI(framep) 269 #endif 270 271 #if defined(MIPS3_PLUS) && defined(MIPS1) /* XXX bogus! */ 272 #define CLKF_USERMODE(framep) \ 273 ((CPUISMIPS3) ? MIPS3_CLKF_USERMODE(framep): MIPS1_CLKF_USERMODE(framep)) 274 #define CLKF_BASEPRI(framep) \ 275 ((CPUISMIPS3) ? MIPS3_CLKF_BASEPRI(framep): MIPS1_CLKF_BASEPRI(framep)) 276 #endif 277 278 /* 279 * This is used during profiling to integrate system time. It can safely 280 * assume that the process is resident. 281 */ 282 #define PROC_PC(p) \ 283 (((struct frame *)(p)->p_md.md_regs)->f_regs[37]) /* XXX PC */ 284 285 /* 286 * Preempt the current process if in interrupt from user mode, 287 * or after the current trap/syscall if in system mode. 288 */ 289 #define need_resched(ci) \ 290 do { \ 291 want_resched = 1; \ 292 if (curproc != NULL) \ 293 aston(curproc); \ 294 } while (/*CONSTCOND*/0) 295 296 /* 297 * Give a profiling tick to the current process when the user profiling 298 * buffer pages are invalid. On the MIPS, request an ast to send us 299 * through trap, marking the proc as needing a profiling tick. 300 */ 301 #define need_proftick(p) \ 302 do { \ 303 (p)->p_flag |= P_OWEUPC; \ 304 aston(p); \ 305 } while (/*CONSTCOND*/0) 306 307 /* 308 * Notify the current process (p) that it has a signal pending, 309 * process as soon as possible. 310 */ 311 #define signotify(p) aston(p) 312 313 #define aston(p) ((p)->p_md.md_astpending = 1) 314 315 extern int want_resched; /* resched() was called */ 316 317 /* 318 * Misc prototypes and variable declarations. 319 */ 320 struct proc; 321 struct user; 322 323 extern struct proc *fpcurproc; 324 325 /* trap.c */ 326 void netintr(void); 327 int kdbpeek(vaddr_t); 328 329 /* mips_machdep.c */ 330 void dumpsys(void); 331 int savectx(struct user *); 332 void mips_init_msgbuf(void); 333 void savefpregs(struct proc *); 334 void loadfpregs(struct proc *); 335 336 /* locore.S */ 337 int badaddr(void *, size_t); 338 339 /* mips_machdep.c */ 340 void cpu_identify(void); 341 void mips_vector_init(void); 342 343 #endif /* ! _LOCORE */ 344 #endif /* _KERNEL */ 345 #endif /* _CPU_H_ */ 346
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