| History log of /src/sys/arch/arm/cortex/gic.c |
| Revision | | Date | Author | Comments |
| 1.57 |
| 05-Oct-2023 |
riastradh | arm/gic: Check l_blcnt, not l_biglocks.
l_biglocks is a now-defunct temporary storage used only when
sleeping; l_blcnt is the number of kernel locks held by the lwp when
not sleeping.
Should fix arm builds.
|
| 1.56 |
| 26-Jun-2022 |
jmcneill | build fix: remove includes of opt_gic.h
|
| 1.55 |
| 25-Jun-2022 |
jmcneill | Remove GIC_SPLFUNCS.
|
| 1.54 |
| 25-Jun-2022 |
jmcneill | pic: Update ci_cpl in pic_set_priority callback.
Not all ICs need interrupts disabled to update the priority. DAIF accesses
are not cheap, so push the update of ci_cpl from pic_set_priority to the
IC's pic_set_priority callback, and let the IC driver determine whether
or not it needs interrupts disabled.
|
| 1.53 |
| 03-Mar-2022 |
riastradh | arm: Use device_set_private for various drivers.
|
| 1.52 |
| 02-Jan-2022 |
riastradh | arm: Remove #ifdef DIAGNOSTIC now wrong after KASSERT change.
Objects in question aren't volatile here so access is flushable.
|
| 1.51 |
| 21-Oct-2021 |
skrll | Fix some conditionals to match gicv3 and add some comments to describe
what's going on.
Fixes PR port-evbarm/56420
|
| 1.50 |
| 26-Sep-2021 |
jmcneill | If an SGI or PPI is established after interrupts are enabled, make sure
we unblock the source on _all_ CPUs and not just the CPU that is
establishing the interrupt.
|
| 1.49 |
| 10-Aug-2021 |
jmcneill | Make gic_splfuncs optional and disable it by default until it has had
more testing.
|
| 1.48 |
| 10-Aug-2021 |
jmcneill | Use custom spl funcs for GIC and avoid unnecessary pmr register accesses
in splx.
|
| 1.47 |
| 28-Mar-2021 |
skrll | Only target the boot cpu for real with SPI interrupts. I tried to do
this back in 2014, but somehow I missed a spot.
This is a quick-and-dirty fix for the USB stack which expects transfer
completions to be in-order. If interrupts happen across the CPUs then
this isn't guaranteed (yet).
kern/55243 panic at usb_transfer_complete() on raspberry pi 4
|
| 1.46 |
| 23-Feb-2021 |
jmcneill | branches: 1.46.2;
If we are committing a deferred splhigh() to hardware, no need to continue.
|
| 1.45 |
| 21-Feb-2021 |
jmcneill | Apply PMR optimizations from gicv3
|
| 1.44 |
| 09-Feb-2021 |
jakllsch | Avoid an extra daif read when dispatching interrupts by using
ENABLE_INTERRUPT() / DISABLE_INTERRUPT() instead of cpsie() / cpsid() macros.
|
| 1.43 |
| 03-Dec-2020 |
skrll | Provide and use a sev() macro for the sev instruction.
While here use the correct barrier to ensure completion of memory accesses
before a couple of the sev() calls.
|
| 1.42 |
| 26-Sep-2020 |
skrll | branches: 1.42.2;
G/C arm/atomic.h
|
| 1.41 |
| 27-Jul-2020 |
jmcneill | Remove CPU ID test in armgic_match. Perfectly normal to have GIC in
non-Cortex cores.
|
| 1.40 |
| 12-Jul-2020 |
skrll | Avoid undefined behaviour. Detected by KUBSAN.
|
| 1.39 |
| 13-Apr-2020 |
jmcneill | Fix "left shift of 255 by 24 places cannot be represented in type 'int'"
warning from UBSan.
|
| 1.38 |
| 16-Nov-2018 |
jmcneill | branches: 1.38.4; 1.38.10;
Use intr_establish_xname
|
| 1.37 |
| 10-Sep-2018 |
jmcneill | armgic_ipi_send: use GIC interface number, not CPU index, when setting
the target(s) for an IPI.
|
| 1.36 |
| 10-Sep-2018 |
jmcneill | Update sc_mptargets atomically, as PEs will be started up in parallel w/o locking here
|
| 1.35 |
| 15-Jul-2018 |
jmcneill | Support pic_set_affinity and pic_get_affinity
|
| 1.34 |
| 28-Apr-2018 |
jakllsch | branches: 1.34.2;
Cover all pic_maxsources lines for armgic_cpu_init_priorities() and
armgic_cpu_update_priorities().
Previously only the first 32 lines were covered, which is significantly
less than the 1000-some interrupt lines possible.
Only relevant to MULTIPROCESSOR configurations.
|
| 1.33 |
| 01-Apr-2018 |
ryo | Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)
- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
|
| 1.32 |
| 07-Feb-2018 |
jmcneill | branches: 1.32.2;
PR# port-evbarm/49468: Cortex GIC assertion triggered on Allwinner A80 SoC
The priority level is changed by writing to GICC_PMR with interrupts
disabled. However, interrupts are enabled/disabled downstream of the GICC
at the CPU. When raising priority level, there is a window between the time
that interrupts are disabled and the GICC_PMR register is written. If an
interrupt occurs at a previously allowed priority before GICC_PMR is
changed, the CPU will receive the signal when interrupts are re-enabled.
At this time, GICC_PMR is now the new priority level, so reads of
GICC_IAR will report a spurious IRQ.
Move the "old_ipl != IPL_HIGH" test until after we have confirmed that
there is at least one pending IRQ.
|
| 1.31 |
| 14-Jul-2017 |
skrll | KNF
|
| 1.30 |
| 29-Jun-2017 |
jmcneill | ARM Trusted Firmware reserves SGIs 8-15 for secure use. Even without ATF,
U-Boot on some platforms may use SGIs in this range for the PSCI
implementation.
Change ARMGIC_IPI_BASE to 0 from (16 - NIPI) and add a compile-time assert
to ensure that we don't end up with a conflict.
|
| 1.29 |
| 28-Jun-2017 |
skrll | Revert the KERNHIST for now it causes problems
|
| 1.28 |
| 22-Jun-2017 |
skrll | If we see GICC_IAR_IRQ_SSPURIOUS we should also stop looking for irqs
|
| 1.27 |
| 22-Jun-2017 |
skrll | Wrap long line
|
| 1.26 |
| 22-Jun-2017 |
skrll | Print the GICC_IIDR when AB_DEBUG
|
| 1.25 |
| 22-Jun-2017 |
skrll | Add 'armgichist' KERNHIST for (future) debugging.
|
| 1.24 |
| 18-Jun-2017 |
jmcneill | Don't assume that CPU index = GIC CPU interface number. We can determine
the current CPU interface number by reading from the read-only
GICD_ITARGETSR0 through GICD_ITARGETSR7 registers.
This gets interrupts working on Exynos 5422, where the boot processor has
GIC CPU interface #4.
|
| 1.23 |
| 05-Jun-2017 |
skrll | Clean out some #if 0'ed or //'ed code
|
| 1.22 |
| 04-Jun-2017 |
skrll | Initialise all the SGI/PPI priorities for all CPUs to mask the interrupts
|
| 1.21 |
| 30-May-2017 |
jmcneill | branches: 1.21.2;
Use an FDT-based ARM_INTR_IMPL for Tegra.
|
| 1.20 |
| 29-Jul-2015 |
matt | Adjust some of IPLs of various IPIs.
|
| 1.19 |
| 15-Apr-2015 |
matt | Add separate IPI routines for IPI_AST and IPI_KPREEMPT.
|
| 1.18 |
| 11-Apr-2015 |
matt | Add a pic_cpus to the softc which specifies which cpus the pic can send
IPIs to. For GIC, initialize pic_cpus to kcpuset_running since it can handle
all the cpus.
|
| 1.17 |
| 09-Apr-2015 |
matt | All SGIs are MPSAFE so establish them as such.
|
| 1.16 |
| 20-Mar-2015 |
skrll | Trailing whitespace
|
| 1.15 |
| 12-Mar-2015 |
skrll | G/C armgic_last_priority
|
| 1.14 |
| 03-Mar-2015 |
jmcneill | in armgic_establish_irq, make sure to write the new value to GICD_ICFGRn when setting irq type (IST_LEVEL/IST_EDGE)
|
| 1.13 |
| 02-Mar-2015 |
jmcneill | sc_gic_lines is the total number of valid lines but pic_sources[] is sparse; when initializing mpsafe targets make sure to go all the way to the end (sc_pic.pic_maxsources) instead
|
| 1.12 |
| 29-Oct-2014 |
skrll | branches: 1.12.2;
Only target boot cpu for SPIs atm. Fix a couple of bugs in the now
disabled code.
|
| 1.11 |
| 29-Oct-2014 |
skrll | Sprinkle #include "opt_multiprocessor.h"
|
| 1.10 |
| 19-May-2014 |
rmind | branches: 1.10.2;
Implement MI IPI interface with cross-call support.
|
| 1.9 |
| 27-Apr-2014 |
matt | When dealing with the PMR register, only use non-secure priority values.
|
| 1.8 |
| 13-Apr-2014 |
matt | Move aprint to print sooner.
|
| 1.7 |
| 28-Mar-2014 |
matt | branches: 1.7.2;
Various MP changes.
|
| 1.6 |
| 04-Mar-2014 |
matt | Don't byte swap the data, assume the bus_space will do it.
|
| 1.5 |
| 17-Dec-2013 |
joerg | branches: 1.5.2;
armgic_priority_to_ipl is only used in #if 0'd code, so apply that as
well.
|
| 1.4 |
| 20-Jun-2013 |
matt | branches: 1.4.2;
Pass the offset from CBAR/PERIPHBASE in mpcore_attach_args.
Modify the list of devices to include the offset(s) from PERIPHBASE.
|
| 1.3 |
| 16-Sep-2012 |
rmind | branches: 1.3.2; 1.3.4;
Rename kcpuset_copybits() to kcpuset_export_u32() and thus be more specific
about the interface.
|
| 1.2 |
| 14-Sep-2012 |
matt | Verify the source isn't a dummy source.
|
| 1.1 |
| 01-Sep-2012 |
matt | branches: 1.1.2;
Add Cortex-A9 support including the ARM Generic Interrupt Controller
and the A9 Global Timer / Watchdog.
|
| 1.1.2.4 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.1.2.3 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.1.2.2 |
| 23-Jun-2013 |
tls | resync from head
|
| 1.1.2.1 |
| 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.3.4.2 |
| 28-Nov-2012 |
matt | Merge improved arm support (especially Cortex) from HEAD
including OMAP and BCM53xx support.
|
| 1.3.4.1 |
| 16-Sep-2012 |
matt | file gic.c was added on branch matt-nb6-plus on 2012-11-28 22:40:26 +0000
|
| 1.3.2.3 |
| 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.3.2.2 |
| 30-Oct-2012 |
yamt | sync with head
|
| 1.3.2.1 |
| 16-Sep-2012 |
yamt | file gic.c was added on branch yamt-pagecache on 2012-10-30 17:19:00 +0000
|
| 1.4.2.1 |
| 18-May-2014 |
rmind | sync with head
|
| 1.5.2.3 |
| 26-Mar-2014 |
matt | Let bus_space so the endian conversion if needed
|
| 1.5.2.2 |
| 15-Feb-2014 |
matt | Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.
|
| 1.5.2.1 |
| 17-Dec-2013 |
matt | file gic.c was added on branch matt-nb5-mips64 on 2014-02-15 16:18:36 +0000
|
| 1.7.2.1 |
| 10-Aug-2014 |
tls | Rebase.
|
| 1.10.2.5 |
| 30-Jul-2015 |
martin | Pull up following revision(s) (requested by skrll in ticket #890):
sys/arch/arm/pic/pic.c: revision 1.27-1.32
sys/arch/arm/omap/omap5430_intr.h: revision 1.3
sys/arch/arm/broadcom/bcm2835_obio.c: revision 1.25
sys/arch/arm/cortex/gic.c: revision 1.18
sys/arch/arm/broadcom/bcm2835reg.h: revision 1.15
sys/arch/evbarm/rpi/rpi_machdep.c: revision 1.61
sys/arch/arm/broadcom/bcm2835_intr.h: revision 1.2
sys/arch/arm/marvell/mvsoc_intr.h: revision 1.5
sys/arch/arm/broadcom/bcm2835_intr.c: revision 1.8-1.10
sys/arch/arm/pic/picvar.h: revision 1.12-1.14
sys/arch/arm/omap/omap4430_intr.h: revision 1.3
Don't clear CI_ASTPENDING in exception return, do it in ast() instead.
Add basic support for __HAVE_PREEMPTION.
Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined.
Use kpreempt_disable/kpreempt_enable
Add __HAVE_PIC_HAVE_PENDING_INTRS and define it if __HAVE_PIC_SET_PRIORITY
is undefined (also define in mvsoc_intr.h since their use of the latter is
peculiar). This new define controls whether the pending interrupt logic is
compiled. The GIC doesn't use pending interrupts since it uses the priority
level on the GIC to control delivery of interrupts, thus there can never
be a pending interrupt. The kernel shrinks about 4KB with the removal of
the pending interupt support,
Only if we __HAVE_PIC_PENDING_INTRS do we need the variables to track them.
Add #define __HAVE_PIC_PENDING_INTRS for the non-GIC PICs.
Add a pic_cpus to the softc which specifies which cpus the pic can send
IPIs to. For GIC, initialize pic_cpus to kcpuset_running since it can handle
all the cpus.
Adapt pic to deal with the BCM2836 interrupts.
Move pic_pending_pics, pic_pending_ipls, and pic_blocked_irqs into a
structure and make then per-cpu. There is no global interrupt state anymore.
Use right kcpuset call.
Don't need pic_ipi_sender anymore.
Don't send IPIs to ourselves if sending to everyone.
RPI2 MP support.
Thanks to Matt Thomas for making this possible with his changes to pic.c
Use a bit per IPI type in local mailbox 0 registers. Ok matt@
IPIs should be IPL_HIGH according to rmind@
Fix bcm2836mp_pic_{un,}block_irqs to handle timer AND mailbox interrupts
if they're both passed. Thanks to nat@ for finding this.
Sprinkle some KASSERTs
|
| 1.10.2.4 |
| 21-Mar-2015 |
snj | Pull up following revision(s) (requested by skrll in ticket #627):
sys/arch/arm/cortex/gic.c: revision 1.16
Trailing whitespace
|
| 1.10.2.3 |
| 15-Mar-2015 |
snj | Pull up following revision(s) (requested by skrll in ticket #591):
sys/arch/arm/cortex/gic.c: revision 1.15
G/C armgic_last_priority
|
| 1.10.2.2 |
| 07-Mar-2015 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #567):
sys/arch/arm/cortex/gic.c: revision 1.13, 1.14
in armgic_establish_irq, make sure to write the new value to GICD_ICFGRn
when setting irq type (IST_LEVEL/IST_EDGE)
--
sc_gic_lines is the total number of valid lines but pic_sources[] is
sparse; when initializing mpsafe targets make sure to go all the way to
the end (sc_pic.pic_maxsources) instead
|
| 1.10.2.1 |
| 09-Nov-2014 |
martin | Pull up following revision(s) (requested by skrll in ticket #188):
sys/arch/arm/include/arm32/pmap.h: revision 1.136
sys/arch/arm/include/armreg.h: revision 1.100
sys/arch/arm/cortex/gic.c: revision 1.11
sys/arch/arm/arm32/db_interface.c: revision 1.54
sys/arch/arm/include/armreg.h: revision 1.101
sys/arch/arm/cortex/gic.c: revision 1.12
sys/arch/arm/arm32/arm32_machdep.c: revision 1.107
sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20
sys/arch/evbarm/conf/BPI: revision 1.5
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21
sys/arch/arm/arm32/pmap.c: revision 1.306
sys/arch/arm/arm32/db_machdep.c: revision 1.22
sys/arch/arm/arm32/arm32_tlb.c: revision 1.3
sys/arch/arm/arm/undefined.c: revision 1.55
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22
sys/arch/arm/arm32/pmap.c: revision 1.307
sys/arch/arm/arm32/arm32_tlb.c: revision 1.4
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23
sys/arch/arm/arm32/arm32_tlb.c: revision 1.5
sys/arch/evbarm/conf/BPI: revision 1.8
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24
sys/arch/arm/arm32/arm32_tlb.c: revision 1.6
sys/arch/arm/arm32/arm32_tlb.c: revision 1.7
sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5
sys/arch/arm/pic/pic.c: revision 1.23
sys/arch/arm/pic/pic.c: revision 1.24
sys/arch/arm/pic/picvar.h: revision 1.11
sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20
sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16
sys/arch/arm/arm32/pmap.c: revision 1.298
sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17
sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5
sys/arch/arm/arm32/pmap.c: revision 1.310
sys/arch/arm/arm32/pmap.c: revision 1.311
sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19
sys/arch/arm/arm32/arm32_boot.c: revision 1.10
sys/arch/arm/arm/ast.c: revision 1.25
sys/arch/arm/include/armreg.h: revision 1.98
sys/uvm/pmap/pmap_tlb.c: revision 1.10
sys/arch/arm/arm32/arm32_boot.c: revision 1.8
sys/arch/arm/arm32/arm32_boot.c: revision 1.9
sys/arch/arm/arm/arm_machdep.c: revision 1.43
Various ARM MP fixes.
|
| 1.12.2.4 |
| 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.12.2.3 |
| 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.12.2.2 |
| 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.12.2.1 |
| 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.21.2.2 |
| 18-Jul-2017 |
snj | Pull up following revision(s) (requested by jmcneill in ticket #114):
sys/arch/arm/samsung/exynos_intr.h: revision 1.3
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.1
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.2
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.3
sys/arch/arm/sunxi/sunxi_gates.c: revision 1.1
distrib/utils/embedded/mkimage: revision 1.66
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.4
sys/arch/arm/sunxi/sunxi_rsb.c: revision 1.1
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.5
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.6
sys/arch/arm/sunxi/sun8i_h3_ccu.c: revision 1.7
sys/dev/gpio/gpio.c: revision 1.59
sys/arch/arm/sunxi/sunxi_ccu_prediv.c: revision 1.1
sys/conf/Makefile.kern.inc: revision 1.257
sys/arch/evbarm/conf/ODROID-XU_INSTALL: file removal
sys/arch/arm/sunxi/sunxi_ccu_prediv.c: revision 1.2
sys/conf/Makefile.kern.inc: revision 1.258
sys/arch/arm/fdt/psci_fdt.h: revision 1.1
sys/arch/arm/sunxi/sunxi_resets.c: revision 1.1
sys/arch/evbarm/conf/files.sunxi: revision 1.1
sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.8
sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.9
sys/arch/arm/samsung/files.exynos: revision 1.22
distrib/utils/embedded/conf/armv7.conf: revision 1.13
sys/arch/arm/samsung/files.exynos: revision 1.23
sys/arch/evbarm/conf/std.tegra: revision 1.15
distrib/utils/embedded/conf/armv7.conf: revision 1.14
sys/arch/arm/samsung/files.exynos: revision 1.24
distrib/utils/embedded/conf/armv7.conf: revision 1.15
sys/arch/evbarm/sunxi/genassym.cf: revision 1.1
sys/arch/arm/samsung/exynos_fdt.c: file removal
sys/dev/fdt/fdt_pinctrl.c: revision 1.4
sys/arch/arm/samsung/exynos_sysmmu.c: revision 1.2
sys/arch/arm/sunxi/sun8i_h3_gpio.c: revision 1.1
sys/arch/arm/sunxi/sunxi_twi.c: revision 1.1
sys/dev/usb/ehci.c: revision 1.255
sys/arch/arm/sunxi/sunxi_twi.c: revision 1.2
sys/arch/arm/sunxi/sun8i_a83t_ccu.h: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.11
sys/arch/arm/cortex/gic.c: revision 1.24
distrib/evbarm/instkernel/ramdisk/Makefile: revision 1.17
etc/etc.evbarm/Makefile.inc: revision 1.87
etc/etc.evbarm/Makefile.inc: revision 1.88
sys/arch/arm/fdt/gic_fdt.c: revision 1.5
etc/Makefile: revision 1.429
sys/arch/arm/fdt/gic_fdt.c: revision 1.6
sys/arch/arm/fdt/gic_fdt.c: revision 1.7
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.1
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.2
sys/arch/evbarm/conf/std.sunxi: revision 1.1
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.3
sys/arch/evbarm/conf/std.sunxi: revision 1.2
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.4
sys/arch/evbarm/conf/std.sunxi: revision 1.3
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.5
sys/arch/arm/sunxi/sunxi_ccu_div.c: revision 1.1
sys/dev/gpio/gpiovar.h: revision 1.17
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.6
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.7
sys/arch/arm/sunxi/sunxi_gpio.c: revision 1.8
sys/arch/arm/sunxi/sunxi_rsb.h: revision 1.1
sys/arch/arm/samsung/exynos_i2c.c: revision 1.12
sys/dev/fdt/fdtvar.h: revision 1.21
sys/arch/evbarm/sunxi/sunxi_start.S: revision 1.1
sys/arch/arm/samsung/exynos_i2c.c: revision 1.13
sys/dev/fdt/fdtvar.h: revision 1.22
sys/arch/evbarm/conf/SUNXI: revision 1.10
sys/dev/fdt/fdtvar.h: revision 1.23
sys/arch/evbarm/conf/SUNXI: revision 1.11
sys/dev/fdt/gpioleds.c: revision 1.1
sys/dev/fdt/fdtvar.h: revision 1.24
sys/arch/evbarm/conf/SUNXI: revision 1.12
sys/arch/evbarm/conf/SUNXI: revision 1.13
sys/arch/arm/cortex/gic.c: revision 1.30
sys/arch/evbarm/conf/SUNXI: revision 1.14
sys/arch/evbarm/conf/SUNXI: revision 1.15
sys/arch/evbarm/conf/SUNXI: revision 1.16
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.1
etc/Makefile: revision 1.430
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.2
etc/Makefile: revision 1.431
sys/arch/evbarm/conf/VEXPRESS_A15: revision 1.17
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.3
sys/arch/arm/sunxi/sunxi_emac.c: revision 1.4
sys/arch/arm/samsung/exynos5422_clock.c: revision 1.6
sys/arch/arm/samsung/exynos_platform.c: revision 1.1
sys/dev/ofw/ofw_subr.c: revision 1.29
sys/arch/arm/samsung/exynos_platform.c: revision 1.2
sys/arch/evbarm/conf/mk.vexpress: revision 1.3
sys/arch/arm/samsung/exynos_platform.c: revision 1.3
sys/arch/evbarm/conf/mk.vexpress: revision 1.4
sys/arch/arm/samsung/exynos_platform.c: revision 1.4
sys/arch/arm/arm/psci.h: revision 1.1
sys/arch/arm/samsung/exynos_platform.c: revision 1.5
sys/arch/arm/samsung/exynos_platform.c: revision 1.6
sys/arch/evbarm/fdt/fdt_machdep.c: revision 1.10
external/bsd/mdocml/bin/mandoc/Makefile: revision 1.12
sys/dev/fdt/files.fdt: revision 1.17
sys/dev/fdt/files.fdt: revision 1.18
sys/dev/fdt/files.fdt: revision 1.19
sys/arch/arm/samsung/exynos_sscom.c: revision 1.8
sys/arch/arm/sunxi/sun8i_a83t_ccu.c: revision 1.1
sys/arch/arm/sunxi/sunxi_mmc.c: revision 1.1
sys/arch/arm/samsung/exynos_sscom.c: revision 1.9
sys/arch/arm/conf/files.arm: revision 1.133
sys/arch/arm/samsung/mct_var.h: revision 1.5
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.1
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.2
sys/arch/evbarm/conf/std.vexpress: revision 1.6
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.3
sys/arch/arm/sunxi/sun6i_a31_gpio.c: revision 1.1
sys/arch/arm/sunxi/sunxi_platform.c: revision 1.4
sys/arch/arm/sunxi/sun6i_a31_gpio.c: revision 1.2
sys/arch/arm/sunxi/files.sunxi: revision 1.1
sys/dev/ofw/ofw_subr.c: revision 1.30
sys/arch/arm/sunxi/files.sunxi: revision 1.2
sys/dev/ofw/openfirm.h: revision 1.35
sys/arch/arm/sunxi/files.sunxi: revision 1.3
sys/dev/ofw/openfirm.h: revision 1.36
sys/arch/arm/sunxi/files.sunxi: revision 1.4
sys/arch/arm/sunxi/files.sunxi: revision 1.5
sys/arch/evbarm/exynos/exynos_machdep.c: file removal
sys/arch/arm/sunxi/sunxi_gpio.h: revision 1.1
sys/arch/arm/samsung/sscom.c: revision 1.9
sys/arch/arm/sunxi/files.sunxi: revision 1.6
sys/dev/fdt/ohci_fdt.c: revision 1.1
sys/arch/arm/sunxi/sunxi_usbphy.c: revision 1.1
sys/arch/arm/sunxi/sunxi_gpio.h: revision 1.2
sys/arch/arm/sunxi/files.sunxi: revision 1.7
sys/arch/arm/sunxi/sunxi_usbphy.c: revision 1.2
sys/arch/arm/sunxi/sunxi_gpio.h: revision 1.3
sys/arch/arm/sunxi/files.sunxi: revision 1.8
sys/arch/arm/sunxi/sunxi_usbphy.c: revision 1.3
sys/arch/arm/sunxi/files.sunxi: revision 1.9
sys/arch/arm/samsung/exynos_sscom.c: revision 1.10
sys/arch/evbarm/conf/mk.tegra: revision 1.5
sys/arch/arm/samsung/exynos_dwcmmc.c: revision 1.4
sys/arch/evbarm/conf/mk.tegra: revision 1.6
sys/arch/evbarm/conf/EXYNOS: revision 1.15
sys/arch/evbarm/conf/EXYNOS: revision 1.16
sys/arch/evbarm/conf/EXYNOS: revision 1.17
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.1
sys/arch/evbarm/conf/EXYNOS: revision 1.19
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.2
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.3
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.4
sys/arch/arm/sunxi/sunxi_ccu.c: revision 1.5
sys/arch/arm/sunxi/sunxi_emac.h: revision 1.1
sys/arch/evbarm/conf/mk.sunxi: revision 1.1
sys/arch/evbarm/include/bootconfig.h: revision 1.7
sys/arch/evbarm/conf/TEGRA: revision 1.24
sys/arch/arm/arm/psci.c: revision 1.1
sys/dev/led.c: revision 1.1
sys/dev/led.c: revision 1.2
sys/arch/arm/arm/psci_arm.S: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu_gate.c: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu_gate.c: revision 1.2
sys/dev/fdt/ehci_fdt.c: revision 1.1
sys/dev/fdt/ehci_fdt.c: revision 1.2
sys/arch/arm/sunxi/sun6i_a31_ccu.h: revision 1.1
sys/arch/evbarm/conf/EXYNOS: revision 1.21
sys/arch/arm/sunxi/files.sunxi: revision 1.10
sys/arch/arm/sunxi/files.sunxi: revision 1.11
sys/dev/fdt/fdtbus.c: revision 1.14
sys/arch/arm/sunxi/sunxi_mmc.h: revision 1.1
sys/arch/arm/samsung/exynos5422_dma.c: file removal
usr.bin/config/mkmakefile.c: revision 1.69
sys/conf/files: revision 1.1178
sys/arch/arm/sunxi/sunxi_platform.h: revision 1.1
sys/arch/evbarm/exynos/exynos_start.S: revision 1.4
sys/arch/arm/samsung/exynos_pinctrl.c: revision 1.11
sys/arch/arm/samsung/exynos_pinctrl.c: revision 1.12
sys/arch/arm/sunxi/sunxi_rtc.c: revision 1.1
sys/arch/arm/sunxi/sun8i_h3_ccu.h: revision 1.1
sys/arch/arm/samsung/exynos5410_clock.c: revision 1.1
sys/arch/arm/samsung/exynos5410_clock.c: revision 1.2
sys/arch/evbarm/conf/SUNXI: revision 1.1
external/bsd/elftosb/usr.sbin/elftosb/Makefile: revision 1.5
sys/arch/evbarm/conf/SUNXI: revision 1.2
sys/arch/arm/fdt/psci_fdt.c: revision 1.1
sys/arch/evbarm/conf/SUNXI: revision 1.3
sys/arch/evbarm/conf/SUNXI: revision 1.4
sys/arch/evbarm/conf/files.exynos: revision 1.3
sys/arch/evbarm/conf/SUNXI: revision 1.5
sys/arch/evbarm/conf/SUNXI: revision 1.6
sys/arch/arm/sunxi/sunxi_ccu_nm.c: revision 1.1
sys/dev/fdt/fixedfactorclock.c: revision 1.1
sys/dev/fdt/fdt_subr.c: revision 1.14
sys/arch/evbarm/conf/SUNXI: revision 1.7
sys/arch/arm/sunxi/sunxi_ccu_nm.c: revision 1.2
sys/arch/arm/sunxi/sun8i_a83t_gpio.c: revision 1.1
sys/dev/fdt/fdt_subr.c: revision 1.15
sys/arch/evbarm/conf/SUNXI: revision 1.8
sys/arch/arm/sunxi/sunxi_ccu_nm.c: revision 1.3
sys/dev/ic/dwc_mmc_reg.h: revision 1.6
sys/dev/fdt/fdt_subr.c: revision 1.16
sys/arch/evbarm/conf/SUNXI: revision 1.9
usr.bin/config/mkmakefile.c: revision 1.70
sys/dev/fdt/fdt_phy.c: revision 1.1
sys/arch/evbarm/conf/ODROID-XU: file removal
sys/arch/arm/fdt/arm_fdt.c: revision 1.4
sys/arch/arm/samsung/exynos_reg.h: revision 1.14
sys/conf/files: revision 1.1180
sys/arch/arm/samsung/exynos_reg.h: revision 1.15
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.2
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.3
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.4
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.5
sys/arch/arm/sunxi/sunxi_ccu.h: revision 1.6
sys/dev/ic/dwc_mmc_var.h: revision 1.6
sys/arch/arm/samsung/exynos_combiner.c: revision 1.7
sys/arch/evbarm/exynos/platform.h: revision 1.2
sys/arch/arm/fdt/files.fdt: revision 1.12
sys/arch/evbarm/conf/std.exynos: revision 1.2
sys/arch/evbarm/conf/std.exynos: revision 1.3
sys/arch/arm/rockchip/rockchip_dwcmmc.c: revision 1.6
sys/arch/arm/sunxi/sunxi_com.c: revision 1.1
sys/dev/led.h: revision 1.1
sys/arch/evbarm/conf/std.exynos: revision 1.5
sys/arch/arm/sunxi/sunxi_com.c: revision 1.2
sys/arch/evbarm/conf/files.evbarm: revision 1.26
usr.bin/config/defs.h: revision 1.99
sys/arch/arm/fdt/arm_fdtvar.h: revision 1.6
sys/arch/arm/samsung/exynos_soc.c: revision 1.32
sys/arch/arm/sunxi/sun6i_a31_ccu.c: revision 1.1
sys/arch/arm/sunxi/sun6i_a31_ccu.c: revision 1.2
sys/arch/arm/samsung/mct.c: revision 1.11
sys/arch/evbarm/conf/ODROID-U: file removal
sys/arch/arm/samsung/mct.c: revision 1.12
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.1
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.2
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.3
sys/arch/arm/sunxi/sunxi_ccu_nkmp.c: revision 1.4
Get the EXYNOS kernel building again with recent FDT changes. Untested.
Use arm_fdt_cpu_hatch and add mmu entry for DTB
Fix exynos5 devmap, bootstrap, and implement early_putchar.
Calculate UART frequency based on bootloader config.
Fix KERNEL_BASE_PHYS (how did this ever work?)
Avoid divide-by-zero for unconfigured PLLs
Correctly initialize i2cbus attach args.
Add delay and enable mct timecounter.
Fix build w/o VERBOSE_INIT_ARM
Remove ODROID-U and ODROID-XU kernel configs as they no longer work.
- Replace CONSADDR with SSCOM2CONSOLE in example
- Remove gtmr (Exynos5422 uses mct)
- cinclude EXYNOS.local instead of TEGRA.local
Use fdtbus_intr_establish to hook in block interrupts instead of
intr_establish.
Simplify MCT; just enable it and then attach an ARMv7 generic timer.
Add support for building DTB files during kernel build, from christos.
build vexpress-v2p-ca15-tc1.dtb with the kernel
build tegra124-apalis-eval.dtb, tegra124-jetson-tk1.dtb, tegra124-nyan-big.dtb, tegra124-nyan-blaze.dtb, and tegra124-venice2.dtb with the kernel
Allow multiline makeoptions to work by quoting the newline..
Bump for quoting makeoptions with multiple lines.
un-c99
bump required config version for multiline makeoptions feature
Set DTS makeoption in kernel config
Assign DTB files to a variable so we can make -V DTB
put the dtb files with their kernels.
no need for debug printing.
Don't assume that CPU index = GIC CPU interface number. We can determine
the current CPU interface number by reading from the read-only
GICD_ITARGETSR0 through GICD_ITARGETSR7 registers.
This gets interrupts working on Exynos 5422, where the boot processor has
GIC CPU interface #4.
use -v to get the expanded variable.
Use -v to get the expanded variables.
Get baud rate from sclk_uartN instead of uartN. Print IRQ number at attach.
Fix PLL con0 register locations and add uart clocks
Disable exyortc for now, it doesn't work.
More or less a rewrite of dwc_mmc, based on awin_mmc, adding DMA support.
Update for new dwc_mmc driver
Fix dmesg
Add Exynos 5410 clock controller driver.
Fix a few typos in clock parent names for mmc clocks.
From jmcneill@
Update for new dwc_mmc driver
Implement platform reset for exynos5
Attach fdtbus to a /clocks node with no compatible string.
Add support for ARM Power State Coordination Interface (PSCI).
Support interrupt sharing.
Add initial support for Allwinner H3 SoC.
ARM Trusted Firmware reserves SGIs 8-15 for secure use. Even without ATF,
U-Boot on some platforms may use SGIs in this range for the PSCI
implementation.
Change ARMGIC_IPI_BASE to 0 from (16 - NIPI) and add a compile-time assert
to ensure that we don't end up with a conflict.
Add H3 MMC support
SD/MMC clock fixes
Add FDT PHY interface.
Add glue for generic ehci/ohci bindings.
Rename a variable, NFC.
Support parents in different clock domains.
Add USB stuff. Doesn't quite work yet.
Synopsys DesignWare APB UART needs "options COM_AWIN" for now.
Add i2c glue.
Add RTC driver.
PHY registers start at index 1. Now USB works.
Don't allow sharing edge and level triggered interrupts.
Add arm_fdt_memory_dump helper for dumping physical addresses from ddb
Print clocks with aprint_debug
Remove unused defines
Add fdtbus_get_string helper
Add of_search_compatible, which searches an array of compat_data structures
for a matching "compatible" entry matching the supplied OFW node. This
allows us to associate data with compatible strings.
Add driver for Allwinner Gigabit Ethernet (EMAC) as found in sun8i and
later family SoCs.
This is a port of my FreeBSD driver which has been confirmed to work on
Allwinner H3, A83T, and A64 SoCs.
Fix dmesg
Add basic support for Allwinner A31.
Add basic FDT GPIO support.
Fix the pinctrl api to match the spec. A pinctrl config can have more
than one xref, and an xref may have specifier data associated with it.
Enable sunxi pinctrl support
Adjust to new pinctrl API
Add P2WI/RSB driver, based on awin_p2wi.c.
Fix typo in a compat string.
Configure pin defaults at attach
No need to explicitly set pinctrl config 0 now
Fix some register definitions.
Disallow sharing between MPSAFE and non-MPSAFE handlers.
Add of_match_compat_data.
This routine searches an array of compat_data structures for a
matching "compatible" entry matching the supplied OFW node.
Add options __HAVE_CPU_UAREA_ALLOC_IDLELWP
Add support for reserved memory and MEMORY_DISK_DYNAMIC for FDT-based
kernels.
the extent code cannot use the full range of u_long,
so ignore the last page before 4GB too. ok jmcneill@
Copy install ramdisk to releasedir. Provide both a raw ffs and
Legacy U-Boot version of it.
Replace HUMMINGBIRD_A31 with SUNXI kernel on armv7.img and include .dtb
files for SUNXI and TEGRA kernels on the MSDOS partition.
Let the controller provide a default name for pins. This makes pins easier
to locate when we have multiple banks and a variable number of pins per
bank.
Attach gpio(4) to sunxigpio
Test for kernel build directory before reading DTB list
Add support for Allwinner A83T SoC.
Add A83T files
Fixup busdma sync and locking in the RX path. Disable batch RX/TX ints.
Fix AHB2 register definition and explicitly set AHB2 parent to PLL_PERIPH0/2 -- this gives us 50% more bus bandwidth for emac
Restore TX_INTERVAL_DEFAULT to 64
Drop the sunxi_emac_rx_batch feature. It was originally designed to
reduce the amount of mutex unlock/lock cycles during the RX path on
FreeBSD and if_input, but it is not required to drop the lock before
calling if_percpuq_enqueue on NetBSD.
Write back the data value instead of mask in sunxi_gpio_write
Add a helper for exposing LED controls via sysctl.
Add GPIO LED driver.
add gpioleds
Add misc. gates and resets driver, and explicitly enable PIO clocks
at attach.
Add fdtbus_get_string_index helper.
Add driver for fixed-factor clocks.
Add ffclock
Remove the requirement for ehci to attach after companion devices.
"go for it" - skrll@
Remove the hack to find companion devices and just assume 1 companion if
ETTF flag is not set.
Remove pass numbers for ehci/ohci now that the attach order no longer matters
Use unsigned char for ctype functions, suggested by christos
Add : to body of populate_sunxi to appease bash.
port-evbarm/52388: Fix number of args to a debug printf.
|
| 1.21.2.1 |
| 05-Jun-2017 |
snj | Pull up following revision(s) (requested by skrll in ticket #8):
sys/arch/arm/cortex/gic.c: revision 1.22
Initialise all the SGI/PPI priorities for all CPUs to mask the interrupts
|
| 1.32.2.5 |
| 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.32.2.4 |
| 30-Sep-2018 |
pgoyette | Ssync with HEAD
|
| 1.32.2.3 |
| 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.32.2.2 |
| 02-May-2018 |
pgoyette | Synch with HEAD
|
| 1.32.2.1 |
| 07-Apr-2018 |
pgoyette | Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
|
| 1.34.2.2 |
| 21-Apr-2020 |
martin | Sync with HEAD
|
| 1.34.2.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.38.10.1 |
| 20-Apr-2020 |
bouyer | Sync with HEAD
|
| 1.38.4.1 |
| 31-Mar-2021 |
martin | Pull up following revision(s) (requested by skrll in ticket #1238):
sys/arch/arm/cortex/gic.c: revision 1.47
Only target the boot cpu for real with SPI interrupts. I tried to do
this back in 2014, but somehow I missed a spot.
This is a quick-and-dirty fix for the USB stack which expects transfer
completions to be in-order. If interrupts happen across the CPUs then
this isn't guaranteed (yet).
kern/55243 panic at usb_transfer_complete() on raspberry pi 4
|
| 1.42.2.2 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.42.2.1 |
| 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
| 1.46.2.1 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
