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History log of /src/sys/arch/powerpc/oea/altivec.c
RevisionDateAuthorComments
 1.35  15-Jun-2024  mrg don't do anything in vec_restore_from_mcontext() if no altivec.

fixes a crash seen on netbsd-10 in PR#58283.

XXX: pullup-10.
 1.34  30-Oct-2021  thorpej branches: 1.34.4;
- In vec_restore_from_mcontext() and vec_save_to_mcontext(), allows the
mcontext argument to be NULL.
- In sendsig_sigcontext(), don't set PSL_VEC in the saved MSR; we can't
actually round-trip the AltiVec registers. At least get them saved
into the PCB by calling vec_save_to_mcontext() (with a NULL mcontext
argument).
- In compat_16_sys___sigreturn14(), call vec_restore_from_mcontext()
with a NULL mcontext argument, which will force any subsequent use
of AltiVec to re-load the AltiVec registers from the PCB.

This isn't ideal, but it's the best we can do with the limited capability
of sigcontext.

Fixes PR port-powerpc/56471.
 1.33  06-Jul-2020  rin Drop unused opt_multiprocessor.h includes.
 1.32  06-Jul-2020  rin Style and cosmetic changes. No binary changes intended.
 1.31  16-Mar-2017  chs allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
 1.30  06-Jul-2015  matt branches: 1.30.2; 1.30.4;
Don't reload if just re-enabling
 1.29  16-May-2014  rmind branches: 1.29.2; 1.29.4;
pcu(9):
- Remove PCU_KERNEL (hi matt!) and significantly simplify the code.
This experimental feature was tried on ARM did not meet the expectations.
It may be revived one day, but it should be done in a much simpler way.
- Add a message structure for xcall function, pass the LWP ower and thus
optimise a race condition: if LWP is discarding its state on a remote CPU,
but another LWP already did it - do not cause an unecessary re-faulting.
- Reduce the variety of flags for PCU operations (only PCU_VALID and
PCU_REENABLE are used now), pass them only to the pcu_state_load().
- Rename pcu_used_p() to pcu_valid_p(); hopefully it is less confusing.
- pcu_save_all_on_cpu: SPL ought to be used here.
- Update and improve the pcu(9) man page; it needs wizd(8) though.
 1.28  23-Aug-2013  matt branches: 1.28.2;
Get rid of MDLWP_USED{FPU,VEC}
 1.27  22-Aug-2013  drochner -extend the pcu(9) API by a function which saves all context on the
current CPU, and use it if a CPU is taken offline
-add a bool argument to pcu_discard which tells whether the internal
"LWP has used the coprocessor" flag should be set or reset. The flag
is reported by pcu_used_p(). If set, future accesses should use the
state stored in the PCB. If reset, it should be reset to default.
The former case is useful for setmcontext().
With that, it should not be necessary anymore to manage the "FPU used"
state by an additional MD variable.

approved by matt
 1.26  26-Dec-2012  matt branches: 1.26.2;
Update to new pcu_state_{load,state,release} definitions
 1.25  07-Jun-2011  matt branches: 1.25.2; 1.25.8; 1.25.12;
zero PCU area when loading used area.
 1.24  25-May-2011  matt branches: 1.24.2;
Set PSL_VEC in the right place.
 1.23  02-May-2011  matt Make sure to enable the vector unit in the PSL when returning to userland.
 1.22  02-May-2011  matt Move powerpc to use pcu to manage FPU/AltiVec/SPE.
 1.21  08-Feb-2011  matt Powerpc send_ipi use ci_cpuid, not cpu_index
 1.20  23-Jan-2011  matt Clear ownership bit after saving contents to PCB.
 1.19  18-Jan-2011  matt branches: 1.19.2;
Fix some fallout from building the macppc GENERIC.MP.
 1.18  18-Jan-2011  matt Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
 1.17  14-Jan-2011  rmind branches: 1.17.2;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.

Various #include fixes and review by matt@.
 1.16  25-Feb-2010  matt branches: 1.16.2;
Adapt to spr.h breakup.
 1.15  21-Nov-2009  rmind branches: 1.15.2;
Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.
 1.14  08-Apr-2008  garbled branches: 1.14.4; 1.14.6; 1.14.26;
SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in
figuring out all the crazy nuances of getting this working, and to
Michael Lorenz for testing/fixing my changes on macppc. Tested with a
quad-proc 7044-270.
Summary of changes:

Bumped CPU_MAXNUM to 16 on ofppc.
Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs.
Fixed a bug in the test for a 64bit bridge cpu early in locore.S
Added code to set the interrupt priority for all CPUs with an openpic.
Change rtas to probe before cpus, to allow use of the rtas freeze/thaw
timebase code routines.
Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM.
Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow
writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies
itself as 0.
Change the hatchstack/interrupt stack allocations to allocate a 8192byte
interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and
allocate them no lower than 0x10000. Allocate them separately to prevent the
hatch stack corrupting the interrupt stack later on.
If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch()
Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp.
Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary
procs early, and place them into a spinloop waiting for the hatch routines
to be ready.
Modify the ipi routines to deal with openpics that reverse byte order on read
from an ipi register. (such as on the 7044)
Change the rtas setup to allocate the rtas physical base address above
the kernel, to avoid mucking up the hatch/interrupt stacks.
 1.13  17-Oct-2007  garbled branches: 1.13.16;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
 1.12  09-Feb-2007  ad branches: 1.12.6; 1.12.14; 1.12.22; 1.12.24; 1.12.26; 1.12.28;
Merge newlock2 to head.
 1.11  24-Dec-2005  perry branches: 1.11.20;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
 1.10  11-Dec-2005  christos merge ktrace-lwp.
 1.9  11-Apr-2005  nathanw branches: 1.9.2;
Rewrite the inner loop of vcopypage() and vzeropage() to be entirely
in inline asm and include turning the DMMU off and back on. This
prevents the compiler (especially gcc -O0) from inserting accesses to
locations in virtual address space when such accesses would fail.
 1.8  22-Feb-2005  matt Don't clear PCB_FPU/PCB_ALTIVEC when releasing the FPU/AltiVec unit. Add
new flags to indicate whether the PCB currently owns the FPU/AltiVec unit.
 1.7  16-Apr-2004  matt branches: 1.7.4; 1.7.6;
Add a SAVE/DISCARD flag to save_{fpu,vec}_lwp. Use it appropriately.
Nuke struct fpu and use struct fpreg instead (except for the names, they
were identical). On MP machines, this will avoid an unneeded IPI to save
the register contents that are about to discarded.
 1.6  15-Apr-2004  matt Revamp how user MSR/SRR1 are dealt with.
Add a PSL_USEROK_P(psl) macro which valids the bits (replaces the use of
PSL_USERSTATIC).
Add a PSL_USERSRR1 mask which is used to mask out status bits in the upper
half of SRR1.
Make sure PSL_VEC is set appropriately in userret(). PSL_VEC is in the same
region as SSR1 status bits so it's not preserved on exceptions. Thus we
need to make to set it.
When returning a MSR/SRR1 to userland, always clear the status bits.
Add emulation of the mfpvr, mtmsr, and mfmsr instructions.
 1.5  15-Jul-2003  lukem __KERNEL_RCSID()
 1.4  23-Jun-2003  martin branches: 1.4.2;
Make sure to include opt_foo.h if a defflag option FOO is used.
 1.3  02-Apr-2003  thorpej Use PAGE_SIZE rather than NBPG.
 1.2  05-Mar-2003  matt Make AltiVec registers available via ptrace/procfs. Simplify AltiVec
processing. Add a "common" procfs_machdep.c for PowerPC platforms.
Even though it is supposed to be port specific, most (if not all)
PowerPC ports can just use the common one.
 1.1  03-Feb-2003  matt Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
 1.4.2.5  10-Nov-2005  skrll Sync with HEAD. Here we go again...
 1.4.2.4  04-Mar-2005  skrll Sync with HEAD.

Hi Perry!
 1.4.2.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.4.2.2  18-Sep-2004  skrll Sync with HEAD.
 1.4.2.1  03-Aug-2004  skrll Sync with HEAD
 1.7.6.1  19-Mar-2005  yamt sync with head. xen and whitespace. xen part is not finished.
 1.7.4.1  29-Apr-2005  kent sync with -current
 1.9.2.3  27-Oct-2007  yamt sync with head.
 1.9.2.2  26-Feb-2007  yamt sync with head.
 1.9.2.1  21-Jun-2006  yamt sync with head.
 1.11.20.1  30-Jan-2007  ad Remove support for SA. Ok core@.
 1.12.28.1  25-Oct-2007  bouyer Sync with HEAD.
 1.12.26.1  18-Oct-2007  yamt sync with head.
 1.12.24.1  06-Nov-2007  matt sync with HEAD
 1.12.22.1  26-Oct-2007  joerg Sync with HEAD.

Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.
 1.12.14.1  11-Oct-2007  garbled Move a bunch of the macppc SMP code out of macppc, and down into the
generic OEA code. Add a set of md callbacks into these shared routines,
that any oeappc SMP machine needs to provide. This allows for generally
shared SMP startup code, but still allows for machine-specific
differences in the setup and kicking of the new CPU.

Convert macppc to this new layout. Tested by Macallan.

Add an initial attempt at SMP to prep. Tested on UP machine only,
untested on SMP yet.
 1.12.6.1  23-Oct-2007  ad Sync with head.
 1.13.16.1  02-Jun-2008  mjf Sync with HEAD.
 1.14.26.2  17-Jan-2011  matt Add SPE (signal processing engine) support for mpc85xx/booke. Think of it
as AltiVec-lite (really lite). Genercize AltiVec support so that it could
the same interface could support SPE as well. Rework the FPU support along
the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
 1.14.26.1  07-Jan-2011  matt Deal with new powerpc world.
 1.14.6.2  14-May-2008  wrstuden Per discussion with ad, remove most of the #include <sys/sa.h> lines
as they were including sa.h just for the type(s) needed for syscallargs.h.

Instead, create a new file, sys/satypes.h, which contains just the
types needed for syscallargs.h. Yes, there's only one now, but that
may change and it's probably more likely to change if it'd be difficult
to handle. :-)

Per discussion with matt at n dot o, add an include of satypes.h to
sigtypes.h. Upcall handlers are kinda signal handlers, and signalling
is the header file that's already included for syscallargs.h that
closest matches SA.

This shaves about 3000 lines off of the diff of the branch relative
to the base. That also represents about 18% of the total before this
checkin.

I think this reduction is very good thing.
 1.14.6.1  10-May-2008  wrstuden Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.

Also, kern_sa.c has received partial cleanup. There's still more
to do, though.
 1.14.4.1  11-Mar-2010  yamt sync with head
 1.15.2.1  30-Apr-2010  uebayasi Sync with HEAD.
 1.16.2.3  12-Jun-2011  rmind sync with head
 1.16.2.2  31-May-2011  rmind sync with head
 1.16.2.1  05-Mar-2011  rmind sync with head
 1.17.2.1  06-Jun-2011  jruoho Sync with HEAD.
 1.19.2.1  08-Feb-2011  bouyer Sync with HEAD
 1.24.2.1  23-Jun-2011  cherry Catchup with rmind-uvmplock merge.
 1.25.12.3  03-Dec-2017  jdolecek update from HEAD
 1.25.12.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.25.12.1  25-Feb-2013  tls resync with head
 1.25.8.3  19-Nov-2015  bouyer Revert ticket 1310 (second try):
> sys/arch/powerpc/include/psl.h 1.20
> sys/arch/powerpc/include/userret.h 1.29, 1.30
> sys/arch/powerpc/oea/altivec.c 1.30
> sys/arch/powerpc/oea/oea_machdep.c 1.72
> sys/arch/powerpc/powerpc/fpu.c 1.36
>
> powerpc PCU fixes

because it breaks the build:
http://releng.netbsd.org/builds/netbsd-6/201511152000Z/
 1.25.8.2  16-Nov-2015  bouyer Revert ticket 1310:
> sys/arch/powerpc/include/psl.h 1.20
> sys/arch/powerpc/include/userret.h 1.29, 1.30
> sys/arch/powerpc/oea/altivec.c 1.30
> sys/arch/powerpc/oea/oea_machdep.c 1.72
> sys/arch/powerpc/powerpc/fpu.c 1.36
>
> powerpc PCU fixes

because it breaks the build:
http://releng.netbsd.org/builds/netbsd-6/201511152000Z/
 1.25.8.1  15-Nov-2015  bouyer Pull up following revision(s) (requested by matt in ticket #1310):
sys/arch/powerpc/include/userret.h: revision 1.30
sys/arch/powerpc/powerpc/fpu.c: revision 1.36
sys/arch/powerpc/include/psl.h: revision 1.20
sys/arch/powerpc/include/userret.h: revision 1.29
sys/arch/powerpc/oea/oea_machdep.c: revision 1.72
sys/arch/powerpc/oea/altivec.c: revision 1.30
Add a check to make sure that if PSL_FP is set, we own the FPU.
Don't clear PSL_FP/PSL_VEC
Don't reload if just re-enabling
Don't reload the FPU register if this is just a re-enable.
Remove PSL_SPV from BOOKE PSL_USERMOD
Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
 1.25.2.2  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.25.2.1  23-Jan-2013  yamt sync with head
 1.26.2.2  18-May-2014  rmind sync with head
 1.26.2.1  28-Aug-2013  rmind sync with head
 1.28.2.1  10-Aug-2014  tls Rebase.
 1.29.4.2  28-Aug-2017  skrll Sync with HEAD
 1.29.4.1  22-Sep-2015  skrll Sync with HEAD
 1.29.2.1  17-Jul-2015  snj Pull up following revision(s) (requested by matt in ticket #868):
sys/arch/powerpc/include/psl.h: revision 1.20
sys/arch/powerpc/include/userret.h: revisions 1.29, 1.30
sys/arch/powerpc/oea/altivec.c: revision 1.30
sys/arch/powerpc/oea/oea_machdep.c: revision 1.72
sys/arch/powerpc/powerpc/fpu.c: revision 1.36
Add a check to make sure that if PSL_FP is set, we own the FPU.
--
Don't clear PSL_FP/PSL_VEC
--
Don't reload if just re-enabling
--
Don't reload the FPU register if this is just a re-enable.
--
Remove PSL_SPV from BOOKE PSL_USERMOD
--
Don't preserve PSL_FP/PSL_VEC in cpu_setmcontext.
 1.30.4.1  21-Apr-2017  bouyer Sync with HEAD
 1.30.2.1  20-Mar-2017  pgoyette Sync with HEAD
 1.34.4.1  03-Jul-2024  martin Pull up following revision(s) (requested by tsutsui in ticket #732):

sys/arch/powerpc/oea/altivec.c: revision 1.35

don't do anything in vec_restore_from_mcontext() if no altivec.
fixes a crash seen on netbsd-10 in PR#58283.

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