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History log of /src/sys/arch/shark/isa/isa_irq.S
RevisionDateAuthorComments
 1.18  21-Nov-2020  skrll Adjust egister usage so that r4 and r5 are preserved as cur{cpu,lwp}
respectively as required by the change to make ASTs operate per-LWP
rather than per-CPU. DO_AST_AND_RESTORE_ALIGNMENT_FAULTS expects this.

Remove the call to dosoftints while I'm here as it's dont in DO_AST...

XXX untested
 1.17  30-Jan-2018  skrll branches: 1.17.16;

whitespace
 1.16  02-Dec-2013  joerg Don't use cpsr_all/spsr_all with mrs, it doesn't take a mask.
 1.15  12-Aug-2013  matt Update to unified syntax
 1.14  03-Sep-2012  matt branches: 1.14.2; 1.14.4;
Don't use r7, use r5 instead
 1.13  20-Dec-2010  matt branches: 1.13.8; 1.13.16;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
 1.12  27-Apr-2008  matt branches: 1.12.22;
Merge kernel changes in matt-armv6 to HEAD.
 1.11  06-Jan-2008  matt branches: 1.11.6; 1.11.8; 1.11.10;
Make sure interrupt handler is updating curcpu()->ci_depth
 1.10  03-Dec-2007  ad branches: 1.10.6;
Interrupt handling changes, in discussion since February:

- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
 1.9  17-Oct-2007  garbled branches: 1.9.2;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
 1.8  13-Aug-2007  tsutsui branches: 1.8.2;
In irq_setmasks(), refer spl_masks[current_spl_level] directly
rather than spl_mask which is a saved value in splraise() and
splx() functions because the latter one is not always sync'ed with
current_spl_level and interrupt state could be mangled.

Okay'ed by chris@, and should close PR port-shark/22355.
 1.7  09-Mar-2007  thorpej branches: 1.7.2; 1.7.8; 1.7.10; 1.7.14; 1.7.16; 1.7.18; 1.7.20;
Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing. (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.
 1.6  08-Mar-2007  matt Clean the bitrotting ofw code. Don't export export the underlying irq
dispatch mechanism to the rest of the kernel; they don't need to know.
Nuke IRQSTATS entirely.

XXX ofwgencfg_clock needs to taught about timecounters
 1.5  20-Feb-2007  matt Switch shark from intrcnt to evcnt
 1.4  11-Dec-2005  christos branches: 1.4.24; 1.4.26; 1.4.28;
merge ktrace-lwp.
 1.3  05-Nov-2003  scw branches: 1.3.16;
Use the alignment fault enable/restore macroes in irq_entry.
 1.2  14-Oct-2002  bjh21 branches: 1.2.6;
Continue the " - . - 8" purge. Specifically:

add rd, pc, #foo - . - 8 -> adr rd, foo
ldr rd, [pc, #foo - . - 8] -> ldr rd, foo

Also, when saving the return address for a function pointer call, use
"mov lr, pc" just before the call unless the return address is somewhere
other than just after the call site.

Finally, a few obvious little micro-optimisations like using LDR directly
rather than ADR followed by LDR, and loading directly into PC rather than
bouncing via R0.
 1.1  10-Feb-2002  thorpej branches: 1.1.2; 1.1.14;
Kill arch/arm32. The last platform supported there, Shark, is now
in arch/shark.

(NOTE: arch/dnard, a premature move to split out the Shark support
code, is going to be deleted. It has bit-rotted.)
 1.1.14.2  23-Jun-2002  jdolecek catch up with -current on kqueue branch
 1.1.14.1  10-Feb-2002  jdolecek file isa_irq.S was added on branch kqueue on 2002-06-23 17:41:21 +0000
 1.1.2.3  18-Oct-2002  nathanw Catch up to -current.
 1.1.2.2  28-Feb-2002  nathanw Catch up to -current.
 1.1.2.1  10-Feb-2002  nathanw file isa_irq.S was added on branch nathanw_sa on 2002-02-28 04:11:52 +0000
 1.2.6.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.2.6.2  18-Sep-2004  skrll Sync with HEAD.
 1.2.6.1  03-Aug-2004  skrll Sync with HEAD
 1.3.16.4  21-Jan-2008  yamt sync with head
 1.3.16.3  07-Dec-2007  yamt sync with head
 1.3.16.2  03-Sep-2007  yamt sync with head.
 1.3.16.1  26-Feb-2007  yamt sync with head.
 1.4.28.1  03-Sep-2007  wrstuden Sync w/ NetBSD-4-RC_1
 1.4.26.2  12-Mar-2007  rmind Sync with HEAD.
 1.4.26.1  27-Feb-2007  yamt - sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
 1.4.24.1  28-Aug-2007  liamjfoy Pull up following revision(s) (requested by tsutsui in ticket #844):
sys/arch/shark/isa/isa_irq.S: revision 1.8
sys/arch/shark/isa/clock.c: revision 1.15
Make clockintr() return 1 since it's always handled so that
clock interrupt is properly acounted by evcnt(9) in isa_irq.S.

In irq_setmasks(), refer spl_masks[current_spl_level] directly
rather than spl_mask which is a saved value in splraise() and
splx() functions because the latter one is not always sync'ed with
current_spl_level and interrupt state could be mangled.
Okay'ed by chris@, and should close PR port-shark/22355.
 1.7.20.3  20-Jan-2008  chris Sync to HEAD.
 1.7.20.2  01-Jan-2008  chris Sync with HEAD.
 1.7.20.1  18-Aug-2007  chris Sync with HEAD
 1.7.18.2  09-Dec-2007  jmcneill Sync with HEAD.
 1.7.18.1  16-Aug-2007  jmcneill Sync with HEAD.
 1.7.16.2  28-Feb-2008  rjs Sync with HEAD.
 1.7.16.1  26-Dec-2007  rjs Sync with HEAD.
 1.7.14.1  15-Aug-2007  skrll Sync with HEAD.
 1.7.10.1  03-Oct-2007  garbled Sync with HEAD
 1.7.8.1  18-Apr-2007  thorpej Remove _lock_cas() in favor of atomic_cas_32().
 1.7.2.2  03-Dec-2007  ad Sync with HEAD.
 1.7.2.1  20-Aug-2007  ad Sync with HEAD.
 1.8.2.3  28-Jan-2008  matt Given the that there are only 4 IPLs (ignoring soft IPLs), a number of
cleanups can be done:
Remove _SPL_* aliases.
Don't store irqmasks in ci_cpl, just make it an ipl level.
Add fast softint switching support.
 1.8.2.2  09-Jan-2008  matt sync with HEAD
 1.8.2.1  28-Aug-2007  matt Update to deal with new intr / cpu_info changes.
 1.9.2.2  18-Feb-2008  mjf Sync with HEAD.
 1.9.2.1  08-Dec-2007  mjf Sync with HEAD.
 1.10.6.1  08-Jan-2008  bouyer Sync with HEAD
 1.11.10.1  16-May-2008  yamt sync with head.
 1.11.8.1  18-May-2008  yamt sync with head.
 1.11.6.1  02-Jun-2008  mjf Sync with HEAD.
 1.12.22.1  05-Mar-2011  rmind sync with head
 1.13.16.1  06-Dec-2012  matt Merge changes from -current.
 1.13.8.2  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.13.8.1  30-Oct-2012  yamt sync with head
 1.14.4.2  18-May-2014  rmind sync with head
 1.14.4.1  28-Aug-2013  rmind sync with head
 1.14.2.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.17.16.1  14-Dec-2020  thorpej Sync w/ HEAD.

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