| /src/sys/arch/arm/rockchip/ |
| H A D | rk_cru_gate.c | 48 const uint32_t write_val = enable ? 0 : gate->mask; local in function:rk_cru_gate_enable
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| H A D | rk_cru_mux.c | 78 const uint32_t write_val = __SHIFTIN(index, mux->mask); local in function:rk_cru_mux_set_parent
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| H A D | rk_cru_arm.c | 107 const uint32_t write_val = __SHIFTIN(arm_rate->div - 1, local in function:rk_cru_arm_set_rate_rates
124 uint32_t write_mask, write_val; local in function:rk_cru_arm_set_rate_cpurates
223 const uint32_t write_val = __SHIFTIN(mux, arm->mux_mask); local in function:rk_cru_arm_set_parent
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| H A D | rk3288_usb.c | 125 uint32_t write_mask, write_val; local in function:rk3288_usbphy_enable
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| H A D | rk_cru_composite.c | 53 const uint32_t write_val = enable ? 0 : composite->gate_mask; local in function:rk_cru_composite_enable
205 uint32_t write_val = __SHIFTIN(best_div - 1, composite->div_mask); local in function:rk_cru_composite_set_rate
250 const uint32_t write_val = __SHIFTIN(mux, composite->mux_mask); local in function:rk_cru_composite_set_parent
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| H A D | rk3399_pmucru.c | 248 const uint32_t write_val = pll->mode_mask; local in function:rk3399_pmucru_pll_set_rate
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| H A D | rk_anxdp.c | 81 const uint32_t write_val = crtc_index == 0 ? EDP_LCDC_SEL : 0; local in function:rk_anxdp_select_input
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| H A D | rk_dwhdmi.c | 102 const uint32_t write_val = crtc_index == 0 ? HDMI_LCDC_SEL : 0; local in function:rk_dwhdmi_select_input
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| H A D | rk_cru_pll.c | 253 const uint32_t write_val = pll->mode_mask; local in function:rk_cru_pll_set_rate
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| H A D | rk_usb.c | 121 uint32_t reg, write_mask, write_val; local in function:rk_usb_clk_enable
151 uint32_t reg, write_mask, write_val; local in function:rk_usb_clk_disable
303 uint32_t reg, write_mask, write_val; local in function:rk_usbphy_otg_enable
342 uint32_t reg, write_mask, write_val; local in function:rk_usbphy_host_enable
[all...] |
| H A D | rk3399_cru.c | 1124 uint32_t write_mask, write_val; local in function:rk3399_cru_init
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| H A D | rk3399_iomux.c | 336 const uint32_t write_val = drv_val & 0xffff; local in function:rk3399_iomux_set_drive_strength
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| H A D | rk_gmac.c | 106 uint32_t write_mask, write_val; local in function:rk3288_gmac_set_mode_rgmii
144 uint32_t write_mask, write_val; local in function:rk3288_gmac_set_speed_rgmii
190 uint32_t write_mask, write_val; local in function:rk3328_gmac_set_mode_rgmii
275 uint32_t write_mask, write_val; local in function:rk3399_gmac_set_mode_rgmii
[all...] |