Searched defs:base_reg (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_state_init.c427 uint32_t base_reg; local in function:cube_emit_cs
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_state_init.c426 uint32_t base_reg; local in function:cube_emit_cs
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4_reg_allocate.cpp138 for (int base_reg = j; local in function:brw::brw_vec4_alloc_reg_set
H A Dbrw_fs_reg_allocate.cpp217 for (int base_reg = j; local in function:brw_alloc_reg_set
231 for (int base_reg = j; local in function:brw_alloc_reg_set
/xsrc/external/mit/MesaLib.old/dist/src/util/
H A Dregister_allocate.c268 ra_add_transitive_reg_conflict(struct ra_regs * regs,unsigned int base_reg,unsigned int reg) argument
/xsrc/external/mit/MesaLib/dist/src/util/
H A Dregister_allocate.c160 ra_add_transitive_reg_conflict(struct ra_regs * regs,unsigned int base_reg,unsigned int reg) argument
179 ra_add_transitive_reg_pair_conflict(struct ra_regs * regs,unsigned int base_reg,unsigned int reg0,unsigned int reg1) argument
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/xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/
H A Dir3_spill.c125 struct ir3_register *base_reg; member in struct:ra_spill_ctx
/xsrc/external/mit/MesaLib/dist/src/freedreno/decode/
H A Dcffdec.c1457 const unsigned base_reg = stage == MESA_SHADER_COMPUTE local in function:cp_load_state
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c592 uint32_t base_reg = pipeline->user_data_0[stage]; local in function:radv_emit_userdata_address
642 uint32_t base_reg = pipeline->user_data_0[stage]; local in function:radv_emit_inline_push_consts
2052 uint32_t base_reg; local in function:radv_emit_streamout_buffers
3563 uint32_t base_reg local in function:radv_emit_view_index
3570 uint32_t base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0; local in function:radv_emit_view_index
3611 uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr; local in function:radv_cs_emit_indirect_draw_packet
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/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c792 uint32_t base_reg = pipeline->user_data_0[stage]; local in function:radv_emit_userdata_address
1014 uint32_t base_reg = pipeline->user_data_0[stage]; local in function:radv_emit_inline_push_consts
2963 uint32_t base_reg = cmd_buffer->state.pipeline->user_data_0[MESA_SHADER_VERTEX]; local in function:emit_prolog_inputs
3469 uint32_t base_reg; local in function:radv_emit_streamout_buffers
3568 uint32_t base_reg; local in function:radv_flush_ngg_gs_state
5929 uint32_t base_reg = pipeline->user_data_0[stage]; local in function:radv_emit_view_index
5936 uint32_t base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0; local in function:radv_emit_view_index
5982 uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr; local in function:radv_cs_emit_indirect_draw_packet
6457 const uint32_t base_reg = pipeline->user_data_0[stage]; local in function:radv_emit_ngg_culling_state
7181 uint32_t base_reg; local in function:radv_rt_bind_tables
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