| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| hwmgr_ppt.h | 42 uint16_t mvdd; member in struct:phm_ppt_v1_clock_voltage_dependency_record
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| rv770_smc.h | 113 RV770_SMC_VOLTAGE_VALUE mvdd; member in struct:RV770_SMC_HW_PERFORMANCE_LEVEL
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| nislands_smc.h | 113 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member in struct:NISLANDS_SMC_HW_PERFORMANCE_LEVEL
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| radeon_rv6xx_dpm.c | 1869 u16 vddc, vddci, mvdd; local in function:rv6xx_parse_pplib_clock_info
1870 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd);
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| radeon_rv770_dpm.c | 673 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
1002 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
1079 &table->initialState.levels[0].mvdd);
2254 u16 vddc, vddci, mvdd; local in function:rv7xx_parse_pplib_clock_info
2255 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd);
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| sislands_smc.h | 158 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member in struct:SISLANDS_SMC_HW_PERFORMANCE_LEVEL
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| radeon_atombios.c | 2372 u16 *vddc, u16 *vddci, u16 *mvdd)
2382 *mvdd = 0;
2392 *mvdd = le16_to_cpu(firmware_info->info_22.usBootUpMVDDCVoltage);
2404 u16 vddc, vddci, mvdd; local in function:radeon_atombios_parse_pplib_non_clock_info
2406 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd);
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| radeon_ni_dpm.c | 1755 ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd);
1925 ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
2389 ni_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
3972 u16 vddc, vddci, mvdd; local in function:ni_parse_pplib_clock_info
3973 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd);
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| radeon_si_dpm.c | 4453 si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd);
4613 si_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
5084 ret = si_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
6793 u16 vddc, vddci, mvdd; local in function:si_parse_pplib_clock_info
6794 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd);
6799 si_pi->mvdd_bootup_value = mvdd;
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_vegam_smumgr.c | 606 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd)
612 *voltage = *mvdd = 0;
637 *mvdd = data->vbios_boot_state.mvdd_bootup_value *
639 else if (dep_table->entries[i].mvdd)
640 *mvdd = (uint32_t) dep_table->entries[i].mvdd *
664 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE;
665 else if (dep_table->entries[i].mvdd)
666 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE
816 uint32_t mvdd; local in function:vegam_populate_single_graphic_level
1121 uint32_t mvdd; local in function:vegam_populate_smc_acpi_level
[all...] |
| amdgpu_fiji_smumgr.c | 361 uint32_t clock, uint32_t *voltage, uint32_t *mvdd)
366 *voltage = *mvdd = 0;
392 *mvdd = data->vbios_boot_state.mvdd_bootup_value *
394 else if (dep_table->entries[i].mvdd)
395 *mvdd = (uint32_t) dep_table->entries[i].mvdd *
417 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE;
418 else if (dep_table->entries[i].mvdd)
419 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE
948 uint32_t mvdd; local in function:fiji_populate_single_graphic_level
1312 uint32_t mvdd; local in function:fiji_populate_smc_acpi_level
[all...] |
| amdgpu_polaris10_smumgr.c | 166 /* MVDD Boot value - neccessary for getting rid of the hang that occurs during Mclk DPM enablement */
359 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd)
365 *voltage = *mvdd = 0;
390 *mvdd = data->vbios_boot_state.mvdd_bootup_value *
392 else if (dep_table->entries[i].mvdd)
393 *mvdd = (uint32_t) dep_table->entries[i].mvdd *
415 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE;
416 else if (dep_table->entries[i].mvdd)
417 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE
916 uint32_t mvdd; local in function:polaris10_populate_single_graphic_level
1213 uint32_t mvdd; local in function:polaris10_populate_smc_acpi_level
[all...] |
| amdgpu_tonga_smumgr.c | 253 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd)
283 if (allowed_clock_voltage_table->entries[i].mvdd)
284 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i].mvdd;
301 if (allowed_clock_voltage_table->entries[i-1].mvdd)
302 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i-1].mvdd;
473 "can not populate MVDD voltage table to SMC",
626 uint32_t mvdd; local in function:tonga_populate_single_graphic_level
642 &graphic_level->MinVoltage, &mvdd);
980 uint32_t mvdd = 0; local in function:tonga_populate_single_memory_level
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| sislands_smc.h | 158 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member in struct:SISLANDS_SMC_HW_PERFORMANCE_LEVEL
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| amdgpu_si_dpm.c | 4919 si_populate_initial_mvdd_value(adev, &table->initialState.levels[0].mvdd);
5078 si_populate_mvdd_value(adev, 0, &table->ACPIState.levels[0].mvdd);
5548 ret = si_populate_mvdd_value(adev, pl->mclk, &level->mvdd);
7195 u16 vddc, vddci, mvdd; local in function:si_parse_pplib_clock_info
7196 amdgpu_atombios_get_default_voltages(adev, &vddc, &vddci, &mvdd);
7201 si_pi->mvdd_bootup_value = mvdd;
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| si_dpm.h | 444 RV770_SMC_VOLTAGE_VALUE mvdd; member in struct:RV770_SMC_HW_PERFORMANCE_LEVEL
764 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member in struct:NISLANDS_SMC_HW_PERFORMANCE_LEVEL
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