Searched refs:CLK_TOP_AUD_INTBUS_SEL (Results 1 - 13 of 13) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8135-clk.h80 #define CLK_TOP_AUD_INTBUS_SEL 67 macro
H A Dmt7629-clk.h102 #define CLK_TOP_AUD_INTBUS_SEL 90 macro
H A Dmt8516-clk.h170 #define CLK_TOP_AUD_INTBUS_SEL 136 macro
H A Dmt6765-clk.h149 #define CLK_TOP_AUD_INTBUS_SEL 112 macro
H A Dmt7622-clk.h87 #define CLK_TOP_AUD_INTBUS_SEL 73 macro
H A Dmt8173-clk.h113 #define CLK_TOP_AUD_INTBUS_SEL 101 macro
H A Dmediatek,mt6795-clk.h111 #define CLK_TOP_AUD_INTBUS_SEL 98 macro
H A Dmt2712-clk.h150 #define CLK_TOP_AUD_INTBUS_SEL 117 macro
H A Dmt8192-clk.h42 #define CLK_TOP_AUD_INTBUS_SEL 28 macro
H A Dmediatek,mt8365-clk.h89 #define CLK_TOP_AUD_INTBUS_SEL 77 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi397 clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
H A Dmt8192.dtsi511 clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
1008 <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
H A Dmt8173.dtsi868 <&topckgen CLK_TOP_AUD_INTBUS_SEL>,

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