| /src/sys/arch/riscv/starfive/ |
| jh71x0_clkc.c | 70 struct clk *clk_parent = clk_get_parent(clk); local
71 if (clk_parent == NULL)
74 return clk_get_rate(clk_parent);
99 struct clk *clk_parent = clk_get_parent(clk); local
100 if (clk_parent == NULL)
103 return clk_set_rate(clk_parent, rate);
222 struct clk * const clk_parent = clk_get_parent(clk); local
224 if (clk_parent == NULL)
227 u_int rate = clk_get_rate(clk_parent);
245 struct clk * const clk_parent = clk_get_parent(clk) local
291 struct clk * const clk_parent = clk_get_parent(clk); local
316 struct clk * const clk_parent = clk_get_parent(clk); local
411 struct clk * const clk_parent = clk_get_parent(clk); local
434 struct clk * const clk_parent = clk_get_parent(clk); local
544 struct clk *clk_parent = clk_get_parent(clk); local
569 struct clk * const clk_parent = clk_get_parent(clk); local
586 struct clk * const clk_parent = clk_get_parent(clk); local
[all...] |
| /src/sys/arch/arm/rockchip/ |
| rk_cru_composite.c | 120 struct clk *clk_parent; local
122 clk_parent = clk_get_parent(&clk->base);
123 if (clk_parent == NULL)
126 const u_int prate = clk_get_rate(clk_parent);
145 struct clk *clk_parent; local
150 clk_parent = clk_get_parent(&clk->base);
151 if (clk_parent == NULL)
153 return clk_set_rate(clk_parent, rate);
173 clk_parent = &rclk_parent->base;
175 clk_parent = fdtbus_clock_byname(composite->parents[mux])
[all...] |
| rk_cru.c | 252 struct rk_cru_clk *clk_parent; local
262 clk_parent = rk_cru_clock_find(sc, parent);
263 if (clk_parent != NULL)
264 return &clk_parent->base;
|
| /src/sys/arch/arm/ti/ |
| ti_dpll_clock.c | 251 struct clk *clk_parent = clk_get_parent(clk); local
255 if (clk_parent == NULL)
262 parent_rate = clk_get_rate(clk_parent);
280 struct clk *clk_parent = clk_get_parent(clk); local
284 if (clk_parent == NULL)
287 parent_rate = clk_get_rate(clk_parent);
322 struct clk *clk_parent = clk_get_parent(clk); local
326 if (clk_parent == NULL)
329 parent_rate = clk_get_rate(clk_parent);
361 struct clk *clk_parent = clk_get_parent(clk) local
382 struct clk *clk_parent = clk_get_parent(clk); local
[all...] |
| ti_div_clock.c | 159 struct clk *clk_parent = clk_get_parent(clk); local
161 return clk_enable(clk_parent);
168 struct clk *clk_parent = clk_get_parent(clk); local
173 if (clk_parent == NULL)
202 parent_rate = clk_get_rate(clk_parent);
|
| ti_gate_clock.c | 169 struct clk *clk_parent = clk_get_parent(clk); local
176 return clk_enable(clk_parent);
183 struct clk *clk_parent = clk_get_parent(clk); local
190 return clk_disable(clk_parent);
|
| ti_comp_clock.c | 148 struct clk *clk_parent = clk_get_parent(clk); local
150 if (clk_parent == NULL)
153 return clk_get_rate(clk_parent);
|
| ti_prcm.c | 157 struct ti_prcm_clk *clk_parent; local
167 clk_parent = ti_prcm_clock_find(sc, parent);
168 if (clk_parent != NULL)
169 return &clk_parent->base;
|
| ti_mux_clock.c | 175 struct clk *clk_parent = clk_get_parent(clk); local
177 if (clk_parent == NULL)
180 return clk_get_rate(clk_parent);
|
| /src/sys/dev/clk/ |
| clk.c | 107 struct clk *clk, *clk_parent; local
112 clk_parent = clk_get_parent(clk);
113 if (clk_parent && clk_parent->name)
114 node.sysctl_data = __UNCONST(clk_parent->name);
125 struct clk *clk, *clk_parent; local
130 clk_parent = clk_get_parent(clk);
131 if (clk_parent && clk_parent->domain && clk_parent->domain->name
[all...] |
| /src/sys/arch/arm/nxp/ |
| imx_ccm_composite.c | 98 struct clk *clk_parent; local
104 clk_parent = clk_get_parent(&clk->base);
105 if (clk_parent == NULL)
107 return clk_set_rate(clk_parent, rate);
122 clk_parent = &rclk_parent->base;
124 clk_parent = fdtbus_clock_byname(composite->parents[mux]);
125 if (clk_parent == NULL)
128 const u_int prate = clk_get_rate(clk_parent);
|
| imx_ccm.c | 200 struct imx_ccm_clk *clk_parent; local
210 clk_parent = imx_ccm_clock_find(sc, parent);
211 if (clk_parent != NULL)
212 return &clk_parent->base;
|
| imx6_ccm.c | 99 struct clk *clk_parent = clk_get_parent(clk); local
100 const char *parent_str = clk_parent ? clk_parent->name : "none";
138 struct clk *clk_parent; local
143 clk_parent = clk_get(&sc->sc_clkdom, imxccm_init_parents[n].parent);
144 KASSERT(clk_parent != NULL);
146 int error = clk_set_parent(clk, clk_parent);
150 clk->name, clk_parent->name, error);
152 clk_put(clk_parent);
|
| /src/sys/arch/arm/nvidia/ |
| tegra210_car.c | 805 struct clk *clk_parent = clk_get_parent(clk); local
807 clk_parent ? clk_parent->name : "none");
825 struct clk *clk, *clk_parent; local
834 clk_parent = clk_get(&sc->sc_clkdom,
836 KASSERT(clk_parent != NULL);
838 error = clk_set_parent(clk, clk_parent);
842 clk->name, clk_parent->name, error);
844 clk_put(clk_parent);
1184 struct clk *clk_parent; local
1317 struct clk *clk_parent; local
1334 struct clk *clk_parent; local
1389 struct clk *clk_parent; local
1494 struct clk *clk_parent; local
1520 struct clk *clk_parent; local
1549 struct clk *clk_parent; local
[all...] |
| tegra124_car.c | 803 struct clk *clk, *clk_parent; local
810 clk_parent = clk_get(&sc->sc_clkdom,
812 KASSERT(clk_parent != NULL);
814 error = clk_set_parent(clk, clk_parent);
818 clk->name, clk_parent->name, error);
820 clk_put(clk_parent);
1056 struct clk *clk_parent; local
1059 clk_parent = tegra124_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));
1060 if (clk_parent == NULL)
1062 const u_int rate_parent = tegra124_car_clock_get_rate(sc, clk_parent);
1211 struct clk *clk_parent; local
1238 struct clk *clk_parent; local
1285 struct clk *clk_parent; local
1404 struct clk *clk_parent; local
1430 struct clk *clk_parent; local
1459 struct clk *clk_parent; local
[all...] |
| tegra_drm.h | 102 struct clk *clk_parent; member in struct:tegra_crtc
|
| /src/sys/arch/arm/samsung/ |
| exynos5410_clock.c | 577 struct clk *clk_parent; local
599 clk_parent = exynos5410_clock_get_parent(sc, &eclk->base);
600 eclk_parent = (struct exynos_clk *)clk_parent;
634 struct exynos_clk *clk_parent; local
638 clk_parent = exynos5410_clock_find(eclk->parent);
639 KASSERT(clk_parent != NULL);
641 &clk_parent->base);
662 struct exynos_clk *clk_parent; local
666 clk_parent = exynos5410_clock_find(eclk->parent);
667 KASSERT(clk_parent != NULL)
782 struct clk *clk_parent; local
800 struct clk *clk_parent; local
878 struct clk *clk_parent; local
[all...] |
| exynos5422_clock.c | 702 struct clk *clk_parent; local
724 clk_parent = exynos5422_clock_get_parent(sc, &eclk->base);
725 eclk_parent = (struct exynos_clk *)clk_parent;
759 struct exynos_clk *clk_parent; local
763 clk_parent = exynos5422_clock_find(eclk->parent);
764 KASSERT(clk_parent != NULL);
766 &clk_parent->base);
829 struct clk *clk_parent; local
833 clk_parent = exynos5422_clock_get_parent(sc, &eclk->base);
834 const u_int parent_rate = exynos5422_clock_get_rate(sc, clk_parent);
847 struct clk *clk_parent; local
925 struct clk *clk_parent; local
[all...] |
| /src/sys/arch/arm/sunxi/ |
| sunxi_ccu_div.c | 106 struct sunxi_ccu_clk *clk_parent; local
117 clk_parent = sunxi_ccu_clock_find(sc, pname);
118 if (clk_parent == NULL)
120 const u_int rate = clk_get_rate(&clk_parent->base);
124 best_parent = &clk_parent->base;
|
| sun8i_a23_apbclk.c | 172 struct clk *clk_parent = clk_get_parent(clk); local
177 return clk_get_rate(clk_parent) / (div + 1);
|
| sun9i_a80_cpusclk.c | 173 struct clk *clk_parent = clk_get_parent(clk); local
181 rate = clk_get_rate(clk_parent) / (clk_ratio + 1);
|
| sunxi_ccu.c | 262 struct sunxi_ccu_clk *clk_parent; local
272 clk_parent = sunxi_ccu_clock_find(sc, parent);
273 if (clk_parent != NULL)
274 return &clk_parent->base;
|
| sunxi_gmacclk.c | 200 struct clk *clk_parent = clk_get_parent(clk); local
202 return clk_get_rate(clk_parent);
|
| /src/sys/dev/fdt/ |
| fdt_clock.c | 227 struct clk *clk, *clk_parent; local
246 clk_parent = fdtbus_clock_get_index_prop(phandle, index, "assigned-clock-parents");
247 if (clk_parent != NULL) {
248 error = clk_set_parent(clk, clk_parent);
251 clk->name, clk_parent->name, error);
|
| /src/sys/arch/arm/amlogic/ |
| meson_clk.c | 263 struct meson_clk_clk *clk_parent; local
273 clk_parent = meson_clk_clock_find(sc, parent);
274 if (clk_parent != NULL)
275 return &clk_parent->base;
|
