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Searched
refs:ucode_array_offset_bytes
(Results
1 - 25
of
32
) sorted by relevancy
1
2
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_rlc.c
207
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
215
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
223
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
231
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
239
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
amdgpu_ucode.c
48
DRM_DEBUG("
ucode_array_offset_bytes
: %u\n",
49
le32_to_cpu(hdr->
ucode_array_offset_bytes
));
497
le32_to_cpu(header->
ucode_array_offset_bytes
)),
505
le32_to_cpu(header->
ucode_array_offset_bytes
)),
512
le32_to_cpu(header->
ucode_array_offset_bytes
) +
520
le32_to_cpu(header->
ucode_array_offset_bytes
)),
526
le32_to_cpu(header->
ucode_array_offset_bytes
) +
533
le32_to_cpu(header->
ucode_array_offset_bytes
)),
569
le32_to_cpu(comm_hdr->
ucode_array_offset_bytes
) +
amdgpu_psp_v10_0.c
88
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
);
111
le32_to_cpu(ta_hdr->header.
ucode_array_offset_bytes
);
amdgpu_psp_v11_0.c
127
le32_to_cpu(sos_hdr->header.
ucode_array_offset_bytes
);
167
le32_to_cpu(asd_hdr->header.
ucode_array_offset_bytes
);
188
le32_to_cpu(ta_hdr->header.
ucode_array_offset_bytes
);
215
le32_to_cpu(ta_hdr->header.
ucode_array_offset_bytes
);
amdgpu_si_smc.c
228
(adev->pm.fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
amdgpu_ucode.h
39
uint32_t
ucode_array_offset_bytes
; /* payload offset from the start of the header */
member in struct:common_firmware_header
amdgpu_psp_v3_1.c
100
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
);
118
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
);
amdgpu_gfx_v10_0.c
1087
le32_to_cpu(mec_hdr->header.
ucode_array_offset_bytes
));
1875
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
2085
le32_to_cpu(cp_hdr->header.
ucode_array_offset_bytes
));
2095
le32_to_cpu(cp_hdr->header.
ucode_array_offset_bytes
));
2105
le32_to_cpu(cp_hdr->header.
ucode_array_offset_bytes
));
2115
le32_to_cpu(rlc_hdr->header.
ucode_array_offset_bytes
));
2125
le32_to_cpu(cp_hdr->header.
ucode_array_offset_bytes
));
2146
le32_to_cpu(sdma_hdr->header.
ucode_array_offset_bytes
));
2434
le32_to_cpu(pfp_hdr->header.
ucode_array_offset_bytes
));
2504
le32_to_cpu(ce_hdr->header.
ucode_array_offset_bytes
));
[
all
...]
amdgpu_psp_v12_0.c
81
le32_to_cpu(asd_hdr->header.
ucode_array_offset_bytes
);
amdgpu_cgs.c
475
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
amdgpu_gfx_v7_0.c
2492
le32_to_cpu(pfp_hdr->header.
ucode_array_offset_bytes
));
2502
le32_to_cpu(ce_hdr->header.
ucode_array_offset_bytes
));
2512
le32_to_cpu(me_hdr->header.
ucode_array_offset_bytes
));
2751
le32_to_cpu(mec_hdr->header.
ucode_array_offset_bytes
));
2773
le32_to_cpu(mec2_hdr->header.
ucode_array_offset_bytes
));
3563
(adev->gfx.rlc_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
amdgpu_gmc_v8_0.c
331
(adev->gmc.fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
400
(adev->gmc.fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
amdgpu_gfx_v6_0.c
1997
(adev->gfx.pfp_fw->data + le32_to_cpu(pfp_hdr->header.
ucode_array_offset_bytes
));
2006
(adev->gfx.ce_fw->data + le32_to_cpu(ce_hdr->header.
ucode_array_offset_bytes
));
2015
(adev->gfx.me_fw->data + le32_to_cpu(me_hdr->header.
ucode_array_offset_bytes
));
2555
(adev->gfx.rlc_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
2729
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
2737
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
2745
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
2753
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
2761
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
amdgpu_gmc_v6_0.c
188
(adev->gmc.fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
amdgpu_uvd.c
424
offset = le32_to_cpu(hdr->
ucode_array_offset_bytes
);
amdgpu_vce.c
321
offset = le32_to_cpu(hdr->
ucode_array_offset_bytes
);
amdgpu_vcn.c
273
offset = le32_to_cpu(hdr->
ucode_array_offset_bytes
);
amdgpu_gfx_v9_0.c
1902
le32_to_cpu(mec_hdr->header.
ucode_array_offset_bytes
));
2984
le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
3084
le32_to_cpu(pfp_hdr->header.
ucode_array_offset_bytes
));
3094
le32_to_cpu(ce_hdr->header.
ucode_array_offset_bytes
));
3104
le32_to_cpu(me_hdr->header.
ucode_array_offset_bytes
));
3279
le32_to_cpu(mec_hdr->header.
ucode_array_offset_bytes
));
amdgpu_cik_sdma.c
567
(adev->sdma.instance[i].fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_ucode.c
46
DRM_DEBUG("
ucode_array_offset_bytes
: %u\n",
47
le32_to_cpu(hdr->
ucode_array_offset_bytes
));
radeon_ucode.h
167
uint32_t
ucode_array_offset_bytes
; /* payload offset from the start of the header */
member in struct:common_firmware_header
radeon_ci_smc.c
211
(rdev->smc_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
radeon_si_smc.c
236
(rdev->smc_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
radeon_cik_sdma.c
487
(rdev->sdma_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
496
(rdev->sdma_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
radeon_cik.c
1909
(rdev->mc_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
3936
(rdev->pfp_fw->data + le32_to_cpu(pfp_hdr->header.
ucode_array_offset_bytes
));
3945
(rdev->ce_fw->data + le32_to_cpu(ce_hdr->header.
ucode_array_offset_bytes
));
3954
(rdev->me_fw->data + le32_to_cpu(me_hdr->header.
ucode_array_offset_bytes
));
4292
(rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.
ucode_array_offset_bytes
));
4306
le32_to_cpu(mec2_hdr->header.
ucode_array_offset_bytes
));
5971
(rdev->rlc_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
6461
(rdev->ce_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
6467
(rdev->pfp_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
6473
(rdev->me_fw->data + le32_to_cpu(hdr->header.
ucode_array_offset_bytes
));
[
all
...]
Completed in 140 milliseconds
1
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Indexes created Fri Sep 26 20:09:58 GMT 2025