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Searched
refs:vCG_SPLL_FUNC_CNTL_2
(Results
1 - 18
of
18
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/radeon/
rv770_smc.h
39
uint32_t
vCG_SPLL_FUNC_CNTL_2
;
radeon_rv730_dpm.c
115
sclk->
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(spll_func_cntl_2);
310
table->ACPIState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(spll_func_cntl_2);
351
table->initialState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
radeon_rv740_dpm.c
183
sclk->
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(spll_func_cntl_2);
388
table->ACPIState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(spll_func_cntl_2);
nislands_smc.h
61
uint32_t
vCG_SPLL_FUNC_CNTL_2
;
sislands_smc.h
108
uint32_t
vCG_SPLL_FUNC_CNTL_2
;
radeon_rv770_dpm.c
562
sclk->
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(spll_func_cntl_2);
997
table->ACPIState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(spll_func_cntl_2);
1058
table->initialState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
radeon_ni_dpm.c
1717
table->initialState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
1919
table->ACPIState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(spll_func_cntl_2);
2064
sclk->
vCG_SPLL_FUNC_CNTL_2
= spll_func_cntl_2;
2084
sclk->
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(sclk_tmp.
vCG_SPLL_FUNC_CNTL_2
);
radeon_cypress_dpm.c
1272
table->initialState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
1455
table->ACPIState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
radeon_si_dpm.c
4404
table->initialState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
4603
table->ACPIState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
4846
sclk->
vCG_SPLL_FUNC_CNTL_2
= spll_func_cntl_2;
4866
sclk->
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(sclk_tmp.
vCG_SPLL_FUNC_CNTL_2
);
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
smu7_hwmgr.h
116
uint32_t
vCG_SPLL_FUNC_CNTL_2
;
amdgpu_smu7_hwmgr.c
4289
data->clock_registers.
vCG_SPLL_FUNC_CNTL_2
=
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sislands_smc.h
108
uint32_t
vCG_SPLL_FUNC_CNTL_2
;
si_dpm.h
370
uint32_t
vCG_SPLL_FUNC_CNTL_2
;
712
uint32_t
vCG_SPLL_FUNC_CNTL_2
;
amdgpu_si_dpm.c
4870
table->initialState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
5068
table->ACPIState.levels[0].sclk.
vCG_SPLL_FUNC_CNTL_2
=
5310
sclk->
vCG_SPLL_FUNC_CNTL_2
= spll_func_cntl_2;
5330
sclk->
vCG_SPLL_FUNC_CNTL_2
= cpu_to_be32(sclk_tmp.
vCG_SPLL_FUNC_CNTL_2
);
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_fiji_smumgr.c
1315
uint32_t spll_func_cntl_2 = data->clock_registers.
vCG_SPLL_FUNC_CNTL_2
;
amdgpu_iceland_smumgr.c
1437
uint32_t spll_func_cntl_2 = data->clock_registers.
vCG_SPLL_FUNC_CNTL_2
;
amdgpu_ci_smumgr.c
1389
uint32_t spll_func_cntl_2 = data->clock_registers.
vCG_SPLL_FUNC_CNTL_2
;
amdgpu_tonga_smumgr.c
1189
uint32_t spll_func_cntl_2 = data->clock_registers.
vCG_SPLL_FUNC_CNTL_2
;
Completed in 61 milliseconds
Indexes created Wed Oct 22 13:09:56 GMT 2025