HomeSort by: relevance | last modified time | path
    Searched refs:vMPLL_DQ_FUNC_CNTL (Results 1 - 16 of 16) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv770_smc.h 52 uint32_t vMPLL_DQ_FUNC_CNTL;
radeon_rv740_dpm.c 279 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
380 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
nislands_smc.h 78 uint32_t vMPLL_DQ_FUNC_CNTL;
sislands_smc.h 124 uint32_t vMPLL_DQ_FUNC_CNTL;
radeon_cypress_dpm.c 606 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
1253 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1443 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
radeon_rv770_dpm.c 480 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
988 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
1039 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
radeon_ni_dpm.c 1700 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
1911 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
2288 mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
radeon_si_dpm.c 4386 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
4588 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
4956 mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
smu7_hwmgr.h 124 uint32_t vMPLL_DQ_FUNC_CNTL;
amdgpu_smu7_hwmgr.c 4305 data->clock_registers.vMPLL_DQ_FUNC_CNTL =
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sislands_smc.h 124 uint32_t vMPLL_DQ_FUNC_CNTL;
si_dpm.h 383 uint32_t vMPLL_DQ_FUNC_CNTL;
729 uint32_t vMPLL_DQ_FUNC_CNTL;
amdgpu_si_dpm.c 4852 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
5053 table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
5420 mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c 1062 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL;
1540 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL);
amdgpu_ci_smumgr.c 1038 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL;
1492 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL);
amdgpu_tonga_smumgr.c 805 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL;
1282 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_DQ_FUNC_CNTL);

Completed in 45 milliseconds