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    Searched refs:vMPLL_SS2 (Results 1 - 17 of 17) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv770_smc.h 57 uint32_t vMPLL_SS2;
72 uint32_t vMPLL_SS2;
nislands_smc.h 83 uint32_t vMPLL_SS2;
radeon_rv730_dpm.c 197 mclk->mclk730.vMPLL_SS2 = cpu_to_be32(mpll_ss2);
343 table->initialState.levels[0].mclk.mclk730.vMPLL_SS2 =
sislands_smc.h 128 uint32_t vMPLL_SS2;
radeon_rv740_dpm.c 284 mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2);
radeon_cypress_dpm.c 611 mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2);
1264 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
radeon_rv770_dpm.c 1050 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
radeon_ni_dpm.c 1710 table->initialState.levels[0].mclk.vMPLL_SS2 =
2293 mclk->vMPLL_SS2 = cpu_to_be32(mpll_ss2);
radeon_si_dpm.c 4396 table->initialState.levels[0].mclk.vMPLL_SS2 =
4598 table->ACPIState.levels[0].mclk.vMPLL_SS2 =
4960 mclk->vMPLL_SS2 = cpu_to_be32(mpll_ss2);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
smu7_hwmgr.h 129 uint32_t vMPLL_SS2;
amdgpu_smu7_hwmgr.c 4315 data->clock_registers.vMPLL_SS2 =
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sislands_smc.h 128 uint32_t vMPLL_SS2;
si_dpm.h 388 uint32_t vMPLL_SS2;
403 uint32_t vMPLL_SS2;
734 uint32_t vMPLL_SS2;
amdgpu_si_dpm.c 4862 table->initialState.levels[0].mclk.vMPLL_SS2 =
5063 table->ACPIState.levels[0].mclk.vMPLL_SS2 =
5424 mclk->vMPLL_SS2 = cpu_to_be32(mpll_ss2);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c 1067 uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2;
1550 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2);
amdgpu_ci_smumgr.c 1043 uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2;
1502 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2);
amdgpu_tonga_smumgr.c 810 uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2;
1292 PP_HOST_TO_SMC_UL(data->clock_registers.vMPLL_SS2);

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