Searched refs:BITFIELD_MASK (Results 1 - 25 of 63) sorted by relevance

123

/xsrc/external/mit/MesaLib/dist/src/asahi/compiler/
H A Dagx_pack.c169 (value & BITFIELD_MASK(6)) |
176 (value & BITFIELD_MASK(6)) |
180 (((value >> 6) & BITFIELD_MASK(2)) << 10);
192 (value & BITFIELD_MASK(6)) |
195 (((value >> 6) & BITFIELD_MASK(2)) << 10);
210 (value & BITFIELD_MASK(6)) |
219 (value & BITFIELD_MASK(6)) |
222 (((value >> 6) & BITFIELD_MASK(2)) << 10);
232 (value & BITFIELD_MASK(6)) |
234 (((value >> 6) & BITFIELD_MASK(
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_blend.h72 unsigned mask = BITFIELD_MASK(nr_samples);
/xsrc/external/mit/MesaLib/dist/src/compiler/nir/
H A Dnir_lower_wrmasks.c119 unsigned cur_mask = (BITFIELD_MASK(length) << first_component);
127 nir_intrinsic_set_write_mask(new_intr, BITFIELD_MASK(length));
202 if (nir_intrinsic_write_mask(intr) == BITFIELD_MASK(intr->num_components))
H A Dnir_lower_input_attachments.c143 unsigned load_result_mask = BITFIELD_MASK(load_result_size);
H A Dnir_lower_non_uniform_access.c75 channel_mask &= BITFIELD_MASK(handle->handle->num_components);
H A Dnir_opt_shrink_vectors.c146 instr->dest.write_mask = BITFIELD_MASK(num_components);
H A Dnir_lower_blend.c378 blended = nir_channels(b, blended, (nir_component_mask_t)BITFIELD_MASK(src_num_comps));
/xsrc/external/mit/MesaLib.old/dist/src/util/
H A Dmacros.h302 #define BITFIELD_MASK(b) \ macro
306 (BITFIELD_MASK((b) + (count)) & ~BITFIELD_MASK(b))
/xsrc/external/mit/MesaLib/dist/src/panfrost/lib/
H A Dpan_props.c97 .bin_size = (1 << (raw & BITFIELD_MASK(5))),
98 .max_levels = (raw >> 8) & BITFIELD_MASK(4)
/xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/
H A Dst_atom_array.c122 util_bitcount(inputs_read & BITFIELD_MASK(attr)));
164 util_bitcount(inputs_read & BITFIELD_MASK(attr)));
225 util_bitcount(inputs_read & BITFIELD_MASK(attr)));
275 util_bitcount(inputs_read & BITFIELD_MASK(attr)));
/xsrc/external/mit/MesaLib/dist/src/panfrost/vulkan/
H A Dpanvk_varyings.h77 return util_bitcount(varyings->buf_mask & BITFIELD_MASK(b));
/xsrc/external/mit/MesaLib/dist/src/util/
H A Dmacros.h389 #define BITFIELD_MASK(b) \ macro
393 (BITFIELD_MASK((b) + (count)) & ~BITFIELD_MASK(b))
H A Du_idalloc.c132 buf->data[base + num_alloc - 1] |= BITFIELD_MASK(num % 32);
H A Dbitset.h236 prefix += util_bitcount(x[i] & BITFIELD_MASK(b - i * BITSET_WORDBITS));
/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dv3d_nir_lower_logic_ops.c172 const unsigned masks[4] = { BITFIELD_MASK(bits[0]),
173 BITFIELD_MASK(bits[1]),
174 BITFIELD_MASK(bits[2]),
175 BITFIELD_MASK(bits[3]) };
/xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/
H A Dbi_liveness.c48 unsigned rmask = BITFIELD_MASK(count);
H A Dbir.c118 unsigned mask = BITFIELD_MASK(bi_count_write_registers(ins, d));
H A Dbi_ra.c199 uint64_t mask = BITFIELD_MASK(excess);
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/util/
H A Du_screen.c93 return BITFIELD_MASK(PIPE_PRIM_MAX);
H A Du_threaded_context.h253 #define TC_BUFFER_ID_MASK BITFIELD_MASK(14)
H A Du_vbuf.c316 if (caps->supported_restart_modes != BITFIELD_MASK(PIPE_PRIM_MAX))
321 if (caps->supported_prim_modes != BITFIELD_MASK(PIPE_PRIM_MAX))
349 ((caps->supported_prim_modes & caps->supported_restart_modes & BITFIELD_MASK(PIPE_PRIM_MAX))) !=
350 BITFIELD_MASK(PIPE_PRIM_MAX)) {
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_shaderlib_nir.c42 unsigned mask = BITFIELD_MASK(num_components);
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_nir_lower_rt_intrinsics.c277 sysval = nir_iand_imm(b, geometry_index_dw, BITFIELD_MASK(29));
/xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/
H A Dir3_a4xx.c74 assert(wrmask == BITFIELD_MASK(intr->num_components));
H A Dir3_a6xx.c73 assert(wrmask == BITFIELD_MASK(intr->num_components));

Completed in 25 milliseconds

123