Searched refs:BRW_OPCODE_SEND (Results 1 - 25 of 36) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/intel/common/
H A Dintel_disasm.c34 return (opcode == BRW_OPCODE_SEND ||
/xsrc/external/mit/MesaLib.old/dist/src/intel/common/
H A Dgen_disasm.c38 return (opcode == BRW_OPCODE_SEND ||
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dtest_eu_compact.cpp69 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND &&
132 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND &&
H A Dbrw_eu_emit.c204 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
424 assert(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
1893 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2034 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2144 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2173 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2242 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2295 insn = next_insn(p, BRW_OPCODE_SEND);
2380 insn = next_insn(p, BRW_OPCODE_SEND);
2488 insn = next_insn(p, BRW_OPCODE_SEND);
[all...]
H A Dbrw_vec4_generator.cpp774 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
961 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
998 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1175 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1251 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1315 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1368 brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1886 brw_memory_fence(p, dst, src[0], BRW_OPCODE_SEND, false);
H A Dbrw_fs_generator.cpp698 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
733 insn = brw_next_insn(p, BRW_OPCODE_SEND);
762 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1428 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1511 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
2099 brw_memory_fence(p, dst, src[0], BRW_OPCODE_SEND, src[1].ud);
H A Dbrw_eu_defines.h248 BRW_OPCODE_SEND = 49, enumerator in enum:opcode
H A Dbrw_inst.h531 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
558 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dtest_eu_compact.cpp95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND &&
158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND &&
H A Dbrw_eu_emit.c113 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
221 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
235 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
355 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
459 assert(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
2054 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2206 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2319 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2348 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
2422 brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
[all...]
H A Dbrw_eu.cpp662 { BRW_OPCODE_SEND, 49, "send", 1, 1, GFX_LT(GFX12) },
664 { BRW_OPCODE_SEND, 49, "send", 2, 1, GFX_GE(GFX12) },
H A Dbrw_vec4_generator.cpp773 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
960 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
997 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1174 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1250 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1312 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1363 brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1938 brw_memory_fence(p, dst, src[0], BRW_OPCODE_SEND,
H A Dbrw_fs_generator.cpp834 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
855 brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND);
885 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1647 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
1731 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
2469 BRW_OPCODE_SENDC : BRW_OPCODE_SEND;
H A Dbrw_eu_defines.h250 BRW_OPCODE_SEND, enumerator in enum:opcode
1230 (opcode == BRW_OPCODE_SEND ||
/xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/
H A Dbrw_eu_emit.c1233 struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1329 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1342 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1407 struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1510 struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1565 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1612 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1657 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1711 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1760 insn = brw_next_insn(p, BRW_OPCODE_SEND);
[all...]
H A Dbrw_disasm.c71 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
867 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
878 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 060)
901 if (inst->header.opcode == BRW_OPCODE_SEND ||
1095 if (inst->header.opcode == BRW_OPCODE_SEND ||
H A Dbrw_wm.c196 insn = brw_next_insn(p, BRW_OPCODE_SEND);
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/
H A Dbrw_eu_emit.c1233 struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1329 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1342 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1407 struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1510 struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
1565 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1612 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1657 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1711 insn = brw_next_insn(p, BRW_OPCODE_SEND);
1760 insn = brw_next_insn(p, BRW_OPCODE_SEND);
[all...]
H A Dbrw_disasm.c71 [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
867 } else if (inst->header.opcode != BRW_OPCODE_SEND &&
878 if (inst->header.opcode == BRW_OPCODE_SEND && gen < 060)
901 if (inst->header.opcode == BRW_OPCODE_SEND ||
1095 if (inst->header.opcode == BRW_OPCODE_SEND ||
H A Dbrw_wm.c196 insn = brw_next_insn(p, BRW_OPCODE_SEND);
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_defines.h592 #define BRW_OPCODE_SEND 49 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h592 #define BRW_OPCODE_SEND 49 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_defines.h592 #define BRW_OPCODE_SEND 49 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h592 #define BRW_OPCODE_SEND 49 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_defines.h585 #define BRW_OPCODE_SEND 49 macro

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