Searched refs:control_data_bits (Results 1 - 10 of 10) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_vec4_gs_visitor.h | 70 src_reg control_data_bits; member in class:brw::vec4_gs_visitor
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| H A D | brw_vec4_gs_visitor.cpp | 183 this->control_data_bits = src_reg(this, glsl_type::uint_type); 186 * will set control_data_bits to 0 after emitting the first vertex. 191 inst = emit(MOV(dst_reg(this->control_data_bits), brw_imm_ud(0u))); 294 * Write out a batch of 32 control data bits from the control_data_bits 298 * the URB receives the control data bits. The control_data_bits register is 397 inst = emit(MOV(mrf_reg2, this->control_data_bits)); 415 /* control_data_bits |= stream_id << ((2 * (vertex_count - 1)) % 32) */ 448 emit(OR(dst_reg(this->control_data_bits), this->control_data_bits, mask)); 512 /* Reset control_data_bits t [all...] |
| H A D | brw_fs.h | 381 fs_reg control_data_bits; member in class:fs_visitor
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| H A D | brw_fs_nir.cpp | 2037 * will cause us to set bit 31 of the control_data_bits register to 1. 2048 * control_data_bits register to 0 when the first vertex is emitted. 2053 /* control_data_bits |= 1 << ((vertex_count - 1) % 32) */ 2062 abld.OR(this->control_data_bits, this->control_data_bits, mask); 2163 sources[i++] = this->control_data_bits; 2182 /* control_data_bits |= stream_id << ((2 * (vertex_count - 1)) % 32) */ 2217 abld.OR(this->control_data_bits, this->control_data_bits, mask); 2291 /* Reset control_data_bits t [all...] |
| H A D | brw_fs.cpp | 7521 this->control_data_bits = vgrf(glsl_type::uint_type); 7524 * will set control_data_bits to 0 after emitting the first vertex. 7529 abld.MOV(this->control_data_bits, brw_imm_ud(0u));
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| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_vec4_gs_visitor.h | 71 src_reg control_data_bits; member in class:brw::vec4_gs_visitor
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| H A D | brw_vec4_gs_visitor.cpp | 184 this->control_data_bits = src_reg(this, glsl_type::uint_type); 187 * will set control_data_bits to 0 after emitting the first vertex. 192 inst = emit(MOV(dst_reg(this->control_data_bits), brw_imm_ud(0u))); 271 * Write out a batch of 32 control data bits from the control_data_bits 275 * the URB receives the control data bits. The control_data_bits register is 374 inst = emit(MOV(mrf_reg2, this->control_data_bits)); 385 /* control_data_bits |= stream_id << ((2 * (vertex_count - 1)) % 32) */ 418 emit(OR(dst_reg(this->control_data_bits), this->control_data_bits, mask)); 482 /* Reset control_data_bits t [all...] |
| H A D | brw_fs.h | 417 fs_reg control_data_bits; member in class:fs_visitor
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| H A D | brw_fs_nir.cpp | 2218 * will cause us to set bit 31 of the control_data_bits register to 1. 2229 * control_data_bits register to 0 when the first vertex is emitted. 2234 /* control_data_bits |= 1 << ((vertex_count - 1) % 32) */ 2243 abld.OR(this->control_data_bits, this->control_data_bits, mask); 2344 sources[i++] = this->control_data_bits; 2363 /* control_data_bits |= stream_id << ((2 * (vertex_count - 1)) % 32) */ 2398 abld.OR(this->control_data_bits, this->control_data_bits, mask); 2472 /* Reset control_data_bits t [all...] |
| H A D | brw_fs.cpp | 9174 this->control_data_bits = vgrf(glsl_type::uint_type); 9177 * will set control_data_bits to 0 after emitting the first vertex. 9182 abld.MOV(this->control_data_bits, brw_imm_ud(0u));
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