| /xsrc/external/mit/xf86-video-intel/dist/test/ |
| H A D | dri2-race.c | 27 static const int divisors[N_DIVISORS] = { 0, 1, 16 }; variable in typeref:typename:const int[]
145 loop = 256 >> ffs(divisors[n]);
146 printf("DRI2SwapBuffers(divisor=%d), loop=%d", divisors[n], loop);
168 DRI2SwapBuffers(dpy, win, 0, divisors[n], count & (divisors[n]-1));
176 loop = 256 >> ffs(divisors[n]);
177 printf("xcb_dri2_swap_buffers(divisor=%d), loops=%d", divisors[n], loop);
199 swap_buffers(dpy, win, divisors[n], attachments, nattachments);
207 loop = 256 >> ffs(divisors[n]);
208 printf("DRI2WaitMsc(divisor=%d), loop=%d", divisors[
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_nir_lower_ycbcr_textures.c | 90 const unsigned divisors[2] = {chroma_format <= PIPE_VIDEO_CHROMA_FORMAT_422 ? 2 : 1, local in function:implicit_downsampled_coords
96 if (c < ARRAY_SIZE(divisors) && divisors[c] > 1) {
98 comp[c] = nir_fdiv(b, comp[c], nir_imm_float(b, divisors[c]));
102 comp[c] = implicit_downsampled_coord_unnormalized(b, comp[c], divisors[c]);
107 comp[c] = implicit_downsampled_coord(b, comp[c], nir_channel(b, image_size, c), divisors[c]);
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| H A D | radv_shader.h | 376 uint32_t divisors[MAX_VERTEX_ATTRIBS]; member in struct:radv_vs_input_state
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| H A D | radv_cmd_buffer.c | 2944 uint32_t div = state->divisors[index];
5485 state->divisors[loc] = binding->divisor;
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| H A D | radv_device.c | 2724 state.divisors[i] = 1;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/zink/ |
| H A D | zink_state.h | 39 VkVertexInputBindingDivisorDescriptionEXT divisors[PIPE_MAX_ATTRIBS]; member in struct:zink_vertex_elements_hw_state::__anon549fdfa1020a::__anon549fdfa10308
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| H A D | zink_pipeline.c | 71 vdiv_state.pVertexBindingDivisors = state->element_state->b.divisors;
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| H A D | zink_state.c | 161 ves->hw_state.b.divisors[ves->hw_state.b.divisors_present].divisor = ves->divisor[i];
162 ves->hw_state.b.divisors[ves->hw_state.b.divisors_present].binding = ves->bindings[i].binding;
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_nir_lower_ycbcr_textures.c | 206 const unsigned divisors[2] = {fmt_desc->width_divisor, fmt_desc->height_divisor}; local in function:implicit_downsampled_coords
209 if (c < ARRAY_SIZE(divisors) && divisors[c] > 1 &&
217 divisors[c]);
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/svga/include/ |
| H A D | svga3d_cmd.h | 1491 SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS]; member in struct:__anonc6e2a0b54508
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/svga/include/ |
| H A D | svga3d_cmd.h | 1525 SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS]; member in struct:__anon2dcb6c684508
|
| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 21.3.0.rst | 290 - agx: Include divisors in the vertex shader key
2641 - radeonsi: don't set prefer_mono for fetched instance divisors
2643 - radeonsi: accurately check if instance divisors need a VS update
3124 - zink: clamp instance divisors to max value
3981 - radv: re-emit prolog inputs when the nontrivial divisors state changed
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| H A D | 20.1.0.rst | 2262 - mesa: fix \_mesa_draw_nonzero_divisor_bits to return nonzero divisors
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| H A D | 21.1.0.rst | 942 - radv: Do no use vk_format for getting divisors.
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_instruction_selection.cpp | 12007 needs_instance_index |= key->state->divisors[i] == 1;
12008 needs_start_instance |= key->state->divisors[i] == 0;
12029 uint32_t divisor = key->state->divisors[loc];
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| /xsrc/external/mit/MesaLib/dist/ |
| H A D | .pick_status.json | [all...] |