| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| H A D | radeon_uvd.c | 238 unsigned width_in_mb, height_in_mb, image_size, dpb_size; local in function:calc_dpb_size 292 dpb_size = image_size * max_references; 294 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); 295 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); 301 dpb_size = image_size * max_references; 304 dpb_size += width_in_mb * height_in_mb * max_references * 192; 306 dpb_size += width_in_mb * height_in_mb * 32; 317 dpb_size = image_size * max_references; 320 dpb_size += width_in_mb * height_in_mb * 128; 323 dpb_size 1040 unsigned dpb_size; local in function:ruvd_create_decoder [all...] |
| H A D | radeon_uvd.h | 359 uint32_t dpb_size; member in struct:ruvd_msg::__anon99f44838040a::__anon99f448380508 371 uint32_t dpb_size; member in struct:ruvd_msg::__anon99f44838040a::__anon99f448380608
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| H A D | radeon_uvd.c | 289 unsigned width_in_mb, height_in_mb, image_size, dpb_size; local in function:calc_dpb_size 343 dpb_size = image_size * max_references; 345 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); 346 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); 352 dpb_size = image_size * max_references; 355 dpb_size += width_in_mb * height_in_mb * max_references * 192; 357 dpb_size += width_in_mb * height_in_mb * 32; 372 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) * max_references; 374 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) * max_references; 382 dpb_size 1283 unsigned dpb_size; local in function:ruvd_create_decoder [all...] |
| H A D | radeon_uvd.h | 359 uint32_t dpb_size; member in struct:ruvd_msg::__anon2b567f85040a::__anon2b567f850508 371 uint32_t dpb_size; member in struct:ruvd_msg::__anon2b567f85040a::__anon2b567f850608
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeon/ |
| H A D | radeon_uvd.c | 343 unsigned width_in_mb, height_in_mb, image_size, dpb_size; local in function:calc_dpb_size 397 dpb_size = image_size * max_references; 400 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); 401 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); 407 dpb_size = image_size * max_references; 411 dpb_size += width_in_mb * height_in_mb * max_references * 192; 413 dpb_size += width_in_mb * height_in_mb * 32; 428 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) * max_references; 430 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) * max_references; 438 dpb_size 1222 unsigned dpb_size; local in function:si_common_uvd_create_decoder [all...] |
| H A D | radeon_vcn_dec.c | 824 decode->dpb_size = dec->dpb.res->buf->size; 1139 unsigned width_in_mb, height_in_mb, image_size, dpb_size; local in function:calc_dpb_size 1190 dpb_size = image_size * max_references; 1203 dpb_size = align((align(width, 32) * height * 9) / 4, 256) * max_references; 1205 dpb_size = align((align(width, 32) * height * 3) / 2, 256) * max_references; 1213 dpb_size = image_size * max_references; 1216 dpb_size += width_in_mb * height_in_mb * 128; 1219 dpb_size += width_in_mb * 64; 1222 dpb_size += width_in_mb * 128; 1225 dpb_size 1456 unsigned dpb_size, bs_buf_size, stream_type = 0, ring = RING_VCN_DEC; local in function:radeon_create_decoder [all...] |
| H A D | radeon_uvd.h | 358 uint32_t dpb_size; member in struct:ruvd_msg::__anone03bbef6040a::__anone03bbef60508 370 uint32_t dpb_size; member in struct:ruvd_msg::__anone03bbef6040a::__anone03bbef60608
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| H A D | radeon_vcn_dec.h | 259 unsigned int dpb_size; member in struct:rvcn_dec_message_decode_s
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeon/ |
| H A D | radeon_uvd.c | 336 unsigned width_in_mb, height_in_mb, image_size, dpb_size; local in function:calc_dpb_size 390 dpb_size = image_size * max_references; 393 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); 394 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); 400 dpb_size = image_size * max_references; 404 dpb_size += width_in_mb * height_in_mb * max_references * 192; 406 dpb_size += width_in_mb * height_in_mb * 32; 421 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) * 424 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) * 433 dpb_size 1221 unsigned dpb_size; local in function:si_common_uvd_create_decoder [all...] |
| H A D | radeon_vcn_dec.c | 1550 if (dec->dpb_size) { 1552 r = si_vid_create_tmz_buffer(dec->screen, &dec->dpb, dec->dpb_size, PIPE_USAGE_DEFAULT); 1554 r = si_vid_create_buffer(dec->screen, &dec->dpb, dec->dpb_size, PIPE_USAGE_DEFAULT); 1647 decode->dpb_size = (dec->dpb_type != DPB_DYNAMIC_TIER_2) ? dec->dpb.res->buf->size : 0; 1999 unsigned width_in_mb, height_in_mb, image_size, dpb_size; local in function:calc_dpb_size 2050 dpb_size = image_size * max_references; 2063 dpb_size = align((align(width, 64) * align(height, 64) * 9) / 4, 256) * max_references; 2065 dpb_size = align((align(width, 32) * height * 3) / 2, 256) * max_references; 2073 dpb_size = image_size * max_references; 2076 dpb_size [all...] |
| H A D | radeon_uvd.h | 359 uint32_t dpb_size; member in struct:ruvd_msg::__anon6d6e8069040a::__anon6d6e80690508 371 uint32_t dpb_size; member in struct:ruvd_msg::__anon6d6e8069040a::__anon6d6e80690608
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| H A D | radeon_vcn_dec.h | 402 unsigned int dpb_size; member in struct:rvcn_dec_message_decode_s 1087 unsigned dpb_size; member in struct:radeon_decoder
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| /xsrc/external/mit/libdrm/dist/tests/amdgpu/ |
| H A D | cs_tests.c | 275 const unsigned dpb_size = 15923584, dt_size = 737280; local in function:amdgpu_cs_uvd_decode 290 req.alloc_size += ALIGN(dpb_size, 4*1024); 346 memset(ptr, 0, dpb_size); 348 ptr += ALIGN(dpb_size, 4*1024); 373 dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024);
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| H A D | vcn_tests.c | 609 const unsigned dpb_size = 15923584, dt_size = 737280; local in function:amdgpu_cs_vcn_dec_decode 620 size += ALIGN(dpb_size, 4*1024); 647 dec += ALIGN(dpb_size, 4*1024); 655 dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024);
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| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 20.2.4.rst | 127 - radeon/vcn : Corrected dpb_size calculation for VP9_2
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| H A D | 20.3.0.rst | 4442 - radeon/vcn : Corrected dpb_size calculation for VP9_2
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