Searched refs:instructions (Results 1 - 25 of 520) sorted by path

1234567891011>>

/xsrc/external/mit/MesaLib.old/dist/
H A DREADME.rst55 Contributions are welcome, and step-by-step instructions can be found in our
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_debug.c339 * to by "instructions". */
343 struct radv_shader_inst *instructions)
345 struct radv_shader_inst *last_inst = *num ? &instructions[*num - 1] : NULL;
349 struct radv_shader_inst *inst = &instructions[*num];
399 /* Get the list of instructions.
403 struct radv_shader_inst *instructions = local in function:radv_dump_annotated_shader
407 start_addr, &num_inst, instructions);
412 /* Print instructions with annotations. */
414 struct radv_shader_inst *inst = &instructions[i];
441 free(instructions);
340 si_add_split_disasm(const char * disasm,uint64_t start_addr,unsigned * num,struct radv_shader_inst * instructions) argument
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/
H A Dnir_to_vir.c364 if (!list_empty(&c->cur_block->instructions))
365 last_inst = (struct qinst *)c->cur_block->instructions.prev;
1851 * instructions between each other, so we just need to make
2388 * instructions (one will still be inserted at v3d_vir_to_qpu() for the
2513 * instructions until the results are needed.
H A Dqpu_schedule.c68 /* When walking the instructions in reverse, we need to swap before/after in
547 * instructions after the producer if possible, not just 1.
687 /* No modifying the real instructions on failure. */
733 * instructions of a fragment shader. This is either the
772 * other instructions, allowing us to delay the
997 list_addtail(&inst->link, &block->instructions);
1139 /* Find how far back into previous instructions we can put the THRSW. */
1216 /* If there are no valid instructions to schedule, drop a NOP
1232 * we're done identifying instructions to merge, so put the
1233 * merged instructions o
[all...]
H A Dv3d_compiler.h126 /** Entry in qblock->instructions */
380 struct list_head instructions; member in struct:qblock
421 * Tracking structure for where new instructions should be inserted. Create
447 return (struct vir_cursor){ vir_cursor_add, &block->instructions };
453 return (struct vir_cursor){ vir_cursor_addtail, &block->instructions };
1122 list_for_each_entry(struct qinst, inst, &block->instructions, link)
1125 list_for_each_entry_rev(struct qinst, inst, &block->instructions, link)
1128 list_for_each_entry_safe(struct qinst, inst, &block->instructions, link)
H A Dvir.c426 list_inithead(&block->instructions);
1002 while (!list_empty(&block->instructions)) {
1004 list_first_entry(&block->instructions,
H A Dvir_register_allocate.c47 &block->instructions, link) {
192 /* Make sure that we don't spill the spilling setup instructions. */
298 /* Don't allow spilling of our spilling instructions. There's no way
487 * start with any temp being able to be in any file, then instructions
541 /* The SFU instructions write directly to the
559 /* Payload setup instructions: Force allocate
/xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/
H A Dast.h63 virtual ir_rvalue *hir(exec_list *instructions,
236 virtual ir_rvalue *hir(exec_list *instructions,
239 virtual void hir_no_rvalue(exec_list *instructions,
244 ir_rvalue *do_hir(exec_list *instructions,
323 virtual ir_rvalue *hir(exec_list *instructions,
326 virtual void hir_no_rvalue(exec_list *instructions,
337 handle_method(exec_list *instructions,
425 virtual ir_rvalue *hir(exec_list *instructions,
428 virtual void hir_no_rvalue(exec_list *instructions,
438 virtual ir_rvalue *hir(exec_list *instructions,
[all...]
H A Dast_function.cpp36 process_parameters(exec_list *instructions, exec_list *actual_parameters, argument
50 ir_rvalue *result = ast->hir(instructions, state);
497 generate_call(exec_list *instructions, ir_function_signature *sig, argument
528 instructions, &post_call_conversions,
583 * instructions; just generate an ir_constant.
605 instructions->push_tail(var);
614 instructions->push_tail(call);
622 instructions->append_list(&post_call_conversions);
715 generate_array_index(void *mem_ctx, exec_list *instructions, argument
722 ir_rvalue *outer_array = generate_array_index(mem_ctx, instructions,
1123 process_vec_mat_constructor(exec_list * instructions,const glsl_type * constructor_type,YYLTYPE * loc,exec_list * parameters,struct _mesa_glsl_parse_state * state) argument
1224 process_array_constructor(exec_list * instructions,const glsl_type * constructor_type,YYLTYPE * loc,exec_list * parameters,struct _mesa_glsl_parse_state * state) argument
1375 emit_inline_vector_constructor(const glsl_type * type,exec_list * instructions,exec_list * parameters,void * ctx) argument
1579 emit_inline_matrix_constructor(const glsl_type * type,exec_list * instructions,exec_list * parameters,void * ctx) argument
1847 emit_inline_record_constructor(const glsl_type * type,exec_list * instructions,exec_list * parameters,void * mem_ctx) argument
1881 process_record_constructor(exec_list * instructions,const glsl_type * constructor_type,YYLTYPE * loc,exec_list * parameters,struct _mesa_glsl_parse_state * state) argument
1961 handle_method(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
2039 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
2438 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
[all...]
H A Dast_to_hir.cpp68 exec_list *instructions);
73 remove_per_vertex_blocks(exec_list *instructions,
129 _mesa_ast_to_hir(exec_list *instructions, struct _mesa_glsl_parse_state *state) argument
131 _mesa_glsl_initialize_variables(instructions, state);
137 state->toplevel_ir = instructions;
159 ast->hir(instructions, state);
162 detect_recursion_unlinked(state, instructions);
163 detect_conflicting_assignments(state, instructions);
175 foreach_in_list_safe(ir_instruction, node, instructions) {
182 instructions
930 do_assignment(exec_list * instructions,struct _mesa_glsl_parse_state * state,const char * non_lvalue_description,ir_rvalue * lhs,ir_rvalue * rhs,ir_rvalue ** out_rvalue,bool needs_rvalue,bool is_initializer,YYLTYPE lhs_loc) argument
1052 get_lvalue_copy(exec_list * instructions,ir_rvalue * lvalue) argument
1069 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
1089 hir_no_rvalue(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
1096 hir_no_rvalue(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
1195 get_scalar_boolean_operand(exec_list * instructions,struct _mesa_glsl_parse_state * state,ast_expression * parent_expr,int operand,const char * operand_name,bool * error_emitted) argument
1300 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
1307 hir_no_rvalue(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
1332 do_hir(exec_list * instructions,struct _mesa_glsl_parse_state * state,bool needs_rvalue) argument
2223 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
2245 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
4827 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
5684 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
5852 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6185 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6242 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6408 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6489 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6605 test_to_hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6630 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6641 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6705 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6726 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6737 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6873 condition_to_hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
6908 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
7002 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
7112 ast_process_struct_or_iface_block_members(exec_list * instructions,struct _mesa_glsl_parse_state * state,exec_list * declarations,glsl_struct_field ** fields_ret,bool is_interface,enum glsl_matrix_layout matrix_layout,bool allow_reserved_names,ir_variable_mode var_mode,ast_type_qualifier * layout,unsigned block_stream,unsigned block_xfb_buffer,unsigned block_xfb_offset,unsigned expl_location,unsigned expl_align) argument
7571 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
7687 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
8402 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
8459 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
8514 hir(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
8621 detect_conflicting_assignments(struct _mesa_glsl_parse_state * state,exec_list * instructions) argument
8739 remove_per_vertex_blocks(exec_list * instructions,_mesa_glsl_parse_state * state,ir_variable_mode mode) argument
[all...]
H A Dbuiltin_int64.h89 exec_list *const f0013_parent_instructions = body.instructions;
92 body.instructions = &f0013->then_instructions;
105 exec_list *const f0019_parent_instructions = body.instructions;
107 body.instructions = &f0019->body_instructions;
112 exec_list *const f001A_parent_instructions = body.instructions;
115 body.instructions = &f001A->then_instructions;
120 body.instructions = f001A_parent_instructions;
132 exec_list *const f001C_parent_instructions = body.instructions;
135 body.instructions = &f001C->then_instructions;
144 body.instructions
[all...]
H A Dbuiltin_variables.cpp374 builtin_variable_generator(exec_list *instructions,
428 exec_list * const instructions; member in class:__anonc328bf340110::builtin_variable_generator
457 exec_list *instructions, struct _mesa_glsl_parse_state *state)
458 : instructions(instructions), state(state), symtab(state->symbols),
505 instructions->push_tail(var);
545 instructions->push_tail(var);
1444 _mesa_glsl_initialize_variables(exec_list *instructions, argument
1447 builtin_variable_generator gen(instructions, state);
456 builtin_variable_generator(exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
H A Dhir_field_selection.cpp31 exec_list *instructions,
38 op = expr->subexpressions[0]->hir(instructions, state);
30 _mesa_ast_field_selection_to_hir(const ast_expression * expr,exec_list * instructions,struct _mesa_glsl_parse_state * state) argument
H A Dir.h86 * Base class of all IR instructions
1256 /** Body of instructions in the function. */
1275 * Helper function to run a list of instructions for constant
1680 * \name Jump-like IR instructions.
1724 * Jump instructions used inside loops
2380 void validate_ir_tree(exec_list *instructions);
2388 * If the list of instructions is determined to contain static recursion,
2394 exec_list *instructions);
2399 * If the list of instructions is determined to contain static recursion,
2406 exec_list *instructions);
[all...]
H A Dir_basic_block.cpp50 void call_for_basic_blocks(exec_list *instructions, argument
59 foreach_in_list(ir_instruction, ir, instructions) {
86 * maximal BBs between the instructions that precede main()
87 * and the body of main(). Perhaps those instructions ought
H A Dir_basic_block.h27 void call_for_basic_blocks(exec_list *instructions,
H A Dir_builder.cpp34 instructions->push_tail(ir);
H A Dir_builder.h88 ir_factory(exec_list *instructions = NULL, void *mem_ctx = NULL) argument
89 : instructions(instructions),
122 exec_list *instructions; member in class:ir_builder::ir_factory
H A Dir_builder_print_visitor.cpp135 _mesa_print_builder_for_ir(FILE *f, exec_list *instructions) argument
138 v.run(instructions);
632 print_with_indent("exec_list *const f%04X_parent_instructions = body.instructions;\n\n",
637 print_with_indent("body.instructions = &f%04X->then_instructions;\n\n",
650 print_with_indent("body.instructions = &f%04X->else_instructions;\n\n",
664 print_with_indent("body.instructions = f%04X_parent_instructions;\n",
732 print_with_indent("exec_list *const f%04X_parent_instructions = body.instructions;\n\n",
737 print_with_indent("body.instructions = &f%04X->body_instructions;\n\n",
752 print_with_indent("body.instructions = f%04X_parent_instructions;\n",
H A Dir_builder_print_visitor.h29 _mesa_print_builder_for_ir(FILE *f, exec_list *instructions);
H A Dir_clone.cpp412 fixup_function_calls(struct hash_table *ht, exec_list *instructions) argument
415 v.run(instructions);
H A Dir_expression_flattening.cpp55 do_expression_flattening(exec_list *instructions, argument
60 foreach_in_list(ir_instruction, ir, instructions) {
H A Dir_expression_flattening.h40 void do_expression_flattening(exec_list *instructions,
H A Dir_function_detect_recursion.cpp313 exec_list *instructions)
320 v.run(instructions);
339 exec_list *instructions)
346 v.run(instructions);
312 detect_recursion_unlinked(struct _mesa_glsl_parse_state * state,exec_list * instructions) argument
338 detect_recursion_linked(struct gl_shader_program * prog,exec_list * instructions) argument
H A Dir_hierarchical_visitor.cpp362 ir_hierarchical_visitor::run(exec_list *instructions) argument
364 visit_list_elements(this, instructions);

Completed in 49 milliseconds

1234567891011>>