Searched refs:vs_state (Results 1 - 25 of 33) sorted by relevance

12

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/
H A Dr300_flush.c69 r300->vs_state.dirty = FALSE;
H A Dr300_state.c1388 r300_mark_atom_dirty(r300, &r300->vs_state);
1923 r300->vs_state.state = NULL;
1926 if (vs == r300->vs_state.state) {
1929 r300->vs_state.state = vs;
1936 r300_mark_atom_dirty(r300, &r300->vs_state);
1937 r300->vs_state.size = vs->code.length + 9 +
2015 (struct r300_vertex_shader*)r300->vs_state.state;
H A Dr300_state_derived.c57 struct r300_vertex_shader* vs = r300->vs_state.state;
69 struct r300_vertex_shader* vs = r300->vs_state.state;
306 struct r300_vertex_shader *vs = r300->vs_state.state;
H A Dr300_context.h526 struct r300_atom vs_state; member in struct:r300_context
H A Dr300_context.c197 R300_INIT_ATOM(vs_state, 0);
H A Dr300_emit.c1161 ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
1163 struct r300_vertex_shader *vs = (struct r300_vertex_shader*)r300->vs_state.state;
H A Dr300_blit.c68 util_blitter_save_vertex_shader(r300->blitter, r300->vs_state.state);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/
H A Dr300_flush.c69 r300->vs_state.dirty = FALSE;
H A Dr300_state.c1382 r300_mark_atom_dirty(r300, &r300->vs_state);
1935 r300->vs_state.state = NULL;
1938 if (vs == r300->vs_state.state) {
1941 r300->vs_state.state = vs;
1948 r300_mark_atom_dirty(r300, &r300->vs_state);
1949 r300->vs_state.size = vs->code.length + 9 +
2028 (struct r300_vertex_shader*)r300->vs_state.state;
H A Dr300_state_derived.c57 struct r300_vertex_shader* vs = r300->vs_state.state;
69 struct r300_vertex_shader* vs = r300->vs_state.state;
306 struct r300_vertex_shader *vs = r300->vs_state.state;
H A Dr300_context.h526 struct r300_atom vs_state; member in struct:r300_context
H A Dr300_context.c196 R300_INIT_ATOM(vs_state, 0);
H A Dr300_emit.c1164 ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
1166 struct r300_vertex_shader *vs = (struct r300_vertex_shader*)r300->vs_state.state;
H A Dr300_blit.c68 util_blitter_save_vertex_shader(r300->blitter, r300->vs_state.state);
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di965_video.c512 struct brw_vs_unit_state *vs_state; local in function:i965_create_vs_state
515 &vs_bo, &vs_state) != 0)
520 vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
522 vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
523 vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
524 vs_state->vs6.vs_enable = 0;
525 vs_state->vs6.vert_cache_disable = 1;
H A Di965_render.c938 struct brw_vs_unit_state vs_state; local in function:gen4_create_vs_unit_state
939 memset(&vs_state, 0, sizeof(vs_state));
943 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */
945 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
946 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
947 vs_state.vs6.vs_enable = 0;
948 vs_state.vs6.vert_cache_disable = 1;
950 return intel_bo_alloc_for_data(scrn, &vs_state, sizeof(vs_state),
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_video.c623 struct brw_vs_unit_state vs_state; local in function:i965_create_vs_state
626 memset(&vs_state, 0, sizeof(vs_state));
628 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
630 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
631 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
632 vs_state.vs6.vs_enable = 0;
633 vs_state.vs6.vert_cache_disable = 1;
636 &vs_state, sizeof(vs_state),
[all...]
H A Di965_render.c1211 struct brw_vs_unit_state vs_state; local in function:gen4_create_vs_unit_state
1212 memset(&vs_state, 0, sizeof(vs_state));
1216 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */
1218 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
1219 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
1220 vs_state.vs6.vs_enable = 0;
1221 vs_state.vs6.vert_cache_disable = 1;
1223 return intel_uxa_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state),
[all...]
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_video.c624 struct brw_vs_unit_state vs_state; local in function:i965_create_vs_state
627 memset(&vs_state, 0, sizeof(vs_state));
629 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
631 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
632 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
633 vs_state.vs6.vs_enable = 0;
634 vs_state.vs6.vert_cache_disable = 1;
637 &vs_state, sizeof(vs_state),
[all...]
H A Di965_render.c1211 struct brw_vs_unit_state vs_state; local in function:gen4_create_vs_unit_state
1212 memset(&vs_state, 0, sizeof(vs_state));
1216 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */
1218 vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
1219 vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
1220 vs_state.vs6.vs_enable = 0;
1221 vs_state.vs6.vert_cache_disable = 1;
1223 return intel_uxa_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state),
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dsna_render.h456 uint32_t vs_state; member in struct:gen6_render_state
513 uint32_t vs_state; member in struct:gen7_render_state
572 uint32_t vs_state; member in struct:gen8_render_state
632 uint32_t vs_state; member in struct:gen9_render_state
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/
H A Dfd6_compute.c48 OUT_REG(ring, A6XX_HLSQ_INVALIDATE_CMD(.vs_state = true, .hs_state = true,
H A Dfd6_draw.c394 A6XX_HLSQ_INVALIDATE_CMD(.vs_state = true, .hs_state = true,
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dsna_render.h442 uint32_t vs_state; member in struct:gen6_render_state
492 uint32_t vs_state; member in struct:gen7_render_state
544 uint32_t vs_state; member in struct:gen8_render_state
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c3317 struct radv_vs_input_state *vs_state = local in function:radv_flush_vertex_descriptors
3324 assert(!vs_state || pipeline->use_per_attribute_vb_descs);
3331 vs_state ? cmd_buffer->state.dynamic_vs_input.bindings[i]
3337 if (vs_state) {
3338 unsigned format = vs_state->formats[i];
3343 vs_state->post_shuffle & (1u << i) ? DST_SEL_ZYXW : data_format_dst_sel[dfmt];
3358 if (vs_state) {
3377 if (vs_state)
3378 va += vs_state->offsets[i];
3393 uint32_t attrib_end = vs_state
[all...]

Completed in 46 milliseconds

12